PIC18F45J10 FAMILY
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
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Values
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Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTA
—
—
—
—
RA5
—
RA3
RA2
RA1
RA0
50
50
50
48
49
49
LATA
PORTA Data Latch Register (Read and Write to Data Latch)
TRISA
—
—
TRISA5
VCFG1
C2INV
CVRR
—
TRISA3
PCFG3
CIS
TRISA2
PCFG2
CM2
TRISA1
PCFG1
CM1
TRISA0
PCFG0
CM0
ADCON1
CMCON
CVRCON
—
—
VCFG0
C1INV
CVRSS
C2OUT
CVREN
C1OUT
CVROE
CVR3
CVR2
CVR1
CVR0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
DS39682E-page 100
© 2009 Microchip Technology Inc.