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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
6.1  
Table Reads and Table Writes  
6.0  
FLASH PROGRAM MEMORY  
In order to read and write program memory, there are  
two operations that allow the processor to move bytes  
between the program memory space and the data RAM:  
The Flash program memory is readable, writable and  
erasable during normal operation over the entire VDD  
range.  
Table Read (TBLRD)  
Table Write (TBLWT)  
A read from program memory is executed on one byte  
at a time. A write to program memory is executed on  
blocks of 32 bytes at a time. Program memory is  
erased in blocks of 64 bytes at a time. A bulk erase  
operation may not be issued from user code.  
The program memory space is 16 bits wide, while the  
data RAM space is 8 bits wide. Table reads and table  
writes move data between these two memory spaces  
through an 8-bit register (TABLAT).  
Writing or erasing program memory will cease  
instruction fetches until the operation is complete. The  
program memory cannot be accessed during the write  
or erase, therefore, code cannot execute. An internal  
programming timer terminates program memory writes  
and erases.  
Table read operations retrieve data from program  
memory and places it into the data RAM space.  
Figure 6-1 shows the operation of a table read with  
program memory and data RAM.  
Table write operations store data from the data memory  
space into holding registers in program memory. The  
procedure to write the contents of the holding registers  
into program memory is detailed in Section 6.5 “Writing  
to Flash Program Memory”. Figure 6-2 shows the  
operation of a table write with program memory and data  
RAM.  
A value written to program memory does not need to be  
a valid instruction. Executing a program memory  
location that forms an invalid instruction results in a  
NOP.  
Table operations work with byte entities. A table block  
containing data, rather than program instructions, is not  
required to be word aligned. Therefore, a table block can  
start and end at any byte address. If a table write is being  
used to write executable code into program memory,  
program instructions will need to be word aligned.  
FIGURE 6-1:  
TABLE READ OPERATION  
Instruction: TBLRD*  
Program Memory  
(1)  
Table Pointer  
Table Latch (8-bit)  
TABLAT  
TBLPTRU TBLPTRH TBLPTRL  
Program Memory  
(TBLPTR)  
Note 1: The Table Pointer register points to a byte in program memory.  
© 2008 Microchip Technology Inc.  
DS39631E-page 73  
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