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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
The CALLand GOTOinstructions have the absolute pro-  
gram memory address embedded into the instruction.  
Since instructions are always stored on word boundar-  
ies, the data contained in the instruction is a word  
address. The word address is written to PC<20:1>,  
which accesses the desired byte address in program  
memory. Instruction #2 in Figure 5-4 shows how the  
instruction GOTO 0006h is encoded in the program  
memory. Program branch instructions, which encode a  
relative address offset, operate in the same manner. The  
offset value stored in a branch instruction represents the  
number of single-word instructions that the PC will be  
offset by. Section 24.0 “Instruction Set Summary”  
provides further details of the instruction set.  
5.2.3  
INSTRUCTIONS IN PROGRAM  
MEMORY  
The program memory is addressed in bytes. Instruc-  
tions are stored as two bytes or four bytes in program  
memory. The Least Significant Byte of an instruction  
word is always stored in a program memory location  
with an even address (LSb = 0). To maintain alignment  
with instruction boundaries, the PC increments in steps  
of 2 and the LSb will always read ‘0’ (see Section 5.1.1  
“Program Counter”).  
Figure 5-4 shows an example of how instruction words  
are stored in the program memory.  
FIGURE 5-4:  
INSTRUCTIONS IN PROGRAM MEMORY  
Word Address  
LSB = 1  
LSB = 0  
Program Memory  
Byte Locations →  
000000h  
000002h  
000004h  
000006h  
000008h  
00000Ah  
00000Ch  
00000Eh  
000010h  
000012h  
000014h  
Instruction 1:  
Instruction 2:  
MOVLW  
GOTO  
055h  
0006h  
0Fh  
EFh  
F0h  
C1h  
F4h  
55h  
03h  
00h  
23h  
56h  
Instruction 3:  
MOVFF  
123h, 456h  
the instruction sequence. If the first word is skipped for  
some reason and the second word is executed by itself,  
a NOPis executed instead. This is necessary for cases  
when the two-word instruction is preceded by a condi-  
tional instruction that changes the PC. Example 5-4  
shows how this works.  
5.2.4  
TWO-WORD INSTRUCTIONS  
The standard PIC18 instruction set has four two-word  
instructions: CALL, MOVFF, GOTO and LSFR. In all  
cases, the second word of the instructions always has  
1111’ as its four Most Significant bits; the other 12 bits  
are literal data, usually a data memory address.  
Note:  
See Section 5.6 “PIC18 Instruction  
Execution and the Extended Instruc-  
tion Set” for information on two-word  
instructions in the extended instruction set.  
The use of ‘1111’ in the 4 MSbs of an instruction spec-  
ifies a special form of NOP. If the instruction is executed  
in proper sequence – immediately after the first word –  
the data in the second word is accessed and used by  
EXAMPLE 5-4:  
CASE 1:  
TWO-WORD INSTRUCTIONS  
Source Code  
Object Code  
0110 0110 0000 0000 TSTFSZ  
REG1  
REG1, REG2 ; No, skip this word  
; Execute this word as a NOP  
; continue code  
; is RAM location 0?  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
CASE 2:  
MOVFF  
ADDWF  
REG3  
Object Code  
Source Code  
TSTFSZ  
0110 0110 0000 0000  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
REG1  
; is RAM location 0?  
MOVFF  
REG1, REG2 ; Yes, execute this word  
; 2nd word of instruction  
ADDWF  
REG3  
; continue code  
DS39631E-page 58  
© 2008 Microchip Technology Inc.  
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