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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
SUBFSR  
Subtract Literal from FSR  
SUBULNK  
Subtract Literal from FSR2 and Return  
Syntax:  
SUBFSR f, k  
0 k 63  
f [ 0, 1, 2 ]  
FSR(f) – k FSRf  
None  
Syntax:  
SUBULNK k  
Operands:  
Operands:  
Operation:  
0 k 63  
FSR2 – k FSR2,  
(TOS) PC  
Operation:  
Status Affected:  
Encoding:  
Status Affected: None  
1110  
1001  
ffkk  
kkkk  
Encoding:  
1110  
1001  
11kk  
kkkk  
Description:  
The 6-bit literal ‘k’ is subtracted from  
the contents of the FSR specified by  
‘f’.  
Description:  
The 6-bit literal ‘k’ is subtracted from the  
contents of the FSR2. A RETURNis then  
executed by loading the PC with the TOS.  
The instruction takes two cycles to  
execute; a NOPis performed during the  
second cycle.  
This may be thought of as a special case of  
the SUBFSRinstruction, where f = 3 (binary  
11’); it operates only on FSR2.  
Words:  
1
1
Cycles:  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
Words:  
1
2
Cycles:  
Q Cycle Activity:  
Q1  
Example:  
SUBFSR 2, 23h  
03FFh  
Q2  
Q3  
Q4  
Before Instruction  
FSR2  
After Instruction  
FSR2  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
=
No  
Operation  
No  
Operation  
No  
Operation  
No  
Operation  
=
03DCh  
Example:  
SUBULNK 23h  
Before Instruction  
FSR2  
PC  
=
=
03FFh  
0100h  
After Instruction  
FSR2  
PC  
=
=
03DCh  
(TOS)  
© 2008 Microchip Technology Inc.  
DS39631E-page 313  
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