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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
The secondary oscillators are those external sources  
not connected to the OSC1 or OSC2 pins. These  
sources may continue to operate even after the  
controller is placed in a power-managed mode.  
2.7  
Clock Sources and Oscillator  
Switching  
Like previous PIC18 devices, the PIC18F2420/2520/  
4420/4520 family includes a feature that allows the  
device clock source to be switched from the main oscil-  
lator to an alternate low-frequency clock source.  
PIC18F2420/2520/4420/4520 devices offer two alternate  
clock sources. When an alternate clock source is enabled,  
the various power-managed operating modes are  
available.  
PIC18F2420/2520/4420/4520 devices offer the Timer1  
oscillator as a secondary oscillator. This oscillator, in all  
power-managed modes, is often the time base for  
functions such as a Real-Time Clock (RTC).  
Most often, a 32.768 kHz watch crystal is connected  
between the RC0/T1OSO/T13CKI and RC1/T1OSI  
pins. Like the LP Oscillator mode circuit, loading  
capacitors are also connected from each pin to ground.  
Essentially, there are three clock sources for these  
devices:  
The Timer1 oscillator is discussed in greater detail in  
Section 12.3 “Timer1 Oscillator”.  
• Primary oscillators  
• Secondary oscillators  
• Internal oscillator block  
In addition to being a primary clock source, the internal  
oscillator block is available as a power-managed  
mode clock source. The INTRC source is also used as  
the clock source for several special features, such as  
the WDT and Fail-Safe Clock Monitor.  
The primary oscillators include the External Crystal  
and Resonator modes, the External RC modes, the  
External Clock modes and the internal oscillator block.  
The particular mode is defined by the FOSC<3:0> Con-  
figuration bits. The details of these modes are covered  
earlier in this chapter.  
The clock sources for the PIC18F2420/2520/4420/4520  
devices are shown in Figure 2-8. See Section 23.0  
“Special Features of the CPU” for Configuration  
register details.  
FIGURE 2-8:  
PIC18F2420/2520/4420/4520 CLOCK DIAGRAM  
PIC18F2420/2520/4420/4520  
Primary Oscillator  
LP, XT, HS, RC, EC  
HSPLL, INTOSC/PLL  
T1OSC  
OSC2  
Sleep  
4 x PLL  
OSC1  
OSCTUNE<6>  
Peripherals  
Secondary Oscillator  
T1OSO  
T1OSCEN  
Enable  
Oscillator  
T1OSI  
OSCCON<6:4>  
Internal Oscillator  
CPU  
8 MHz  
OSCCON<6:4>  
111  
110  
101  
4 MHz  
2 MHz  
Internal  
Oscillator  
Block  
IDLEN  
Clock  
Control  
1 MHz  
100  
011  
010  
001  
000  
8 MHz  
Source  
500 kHz  
250 kHz  
125 kHz  
31 kHz  
8 MHz  
(INTOSC)  
INTRC  
Source  
FOSC<3:0> OSCCON<1:0>  
Clock Source Option  
for Other Modules  
1
0
31 kHz (INTRC)  
OSCTUNE<7>  
WDT, PWRT, FSCM  
and Two-Speed Start-up  
DS39631E-page 28  
© 2008 Microchip Technology Inc.  
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