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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
19.2 Selecting and Configuring  
Acquisition Time  
19.3 Selecting the A/D Conversion  
Clock  
The ADCON2 register allows the user to select an  
acquisition time that occurs each time the GO/DONE  
bit is set. It also gives users the option to use an  
automatically determined acquisition time.  
The A/D conversion time per bit is defined as TAD. The  
A/D conversion requires 11 TAD per 10-bit conversion.  
The source of the A/D conversion clock is software  
selectable. There are seven possible options for TAD:  
Acquisition time may be set with the ACQT<2:0> bits  
(ADCON2<5:3>), which provides a range of 2 to  
20 TAD. When the GO/DONE bit is set, the A/D module  
continues to sample the input for the selected acquisi-  
tion time, then automatically begins a conversion.  
Since the acquisition time is programmed, there may  
be no need to wait for an acquisition time between  
selecting a channel and setting the GO/DONE bit.  
• 2 TOSC  
• 4 TOSC  
• 8 TOSC  
• 16 TOSC  
• 32 TOSC  
• 64 TOSC  
• Internal RC Oscillator  
Manual  
acquisition  
is  
selected  
when  
For correct A/D conversions, the A/D conversion clock  
(TAD) must be as short as possible, but greater than the  
minimum TAD (see parameter 130 for more  
information).  
ACQT<2:0> = 000. When the GO/DONE bit is set,  
sampling is stopped and a conversion begins. The user  
is responsible for ensuring the required acquisition time  
has passed between selecting the desired input  
channel and setting the GO/DONE bit. This option is  
also the default Reset state of the ACQT<2:0> bits and  
is compatible with devices that do not offer  
programmable acquisition times.  
Table 19-1 shows the resultant TAD times derived from  
the device operating frequencies and the A/D clock  
source selected.  
In either case, when the conversion is completed, the  
GO/DONE bit is cleared, the ADIF flag is set and the  
A/D begins sampling the currently selected channel  
again. If an acquisition time is programmed, there is  
nothing to indicate if the acquisition time has ended or  
if the conversion has begun.  
TABLE 19-1: TAD vs. DEVICE OPERATING FREQUENCIES  
AD Clock Source (TAD)  
Maximum Device Frequency  
Operation  
ADCS<2:0>  
PIC18F2X20/4X20  
PIC18LF2X2X/4X20(4)  
2 TOSC  
4 TOSC  
8 TOSC  
16 TOSC  
32 TOSC  
64 TOSC  
RC(3)  
000  
100  
001  
101  
010  
110  
x11  
2.86 MHz  
5.71 MHz  
11.43 MHz  
22.86 MHz  
40.0 MHz  
40.0 MHz  
1.00 MHz(1)  
1.43 kHz  
2.86 MHz  
5.72 MHz  
11.43 MHz  
22.86 MHz  
22.86 MHz  
1.00 MHz(2)  
Note 1: The RC source has a typical TAD time of 1.2 μs.  
2: The RC source has a typical TAD time of 2.5 μs.  
3: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion or the A/D  
accuracy may be out of specification.  
4: Low-power (PIC18LFXXXX) devices only.  
© 2008 Microchip Technology Inc.  
DS39631E-page 229