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PIC18F4520-I/ML 参数 Datasheet PDF下载

PIC18F4520-I/ML图片预览
型号: PIC18F4520-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
If SDA is low, a bus collision has occurred (i.e., another  
17.4.17.2 Bus Collision During a Repeated  
Start Condition  
master is attempting to transmit a data ‘0’, Figure 17-29).  
If SDA is sampled high, the BRG is reloaded and begins  
counting. If SDA goes from high-to-low before the BRG  
times out, no bus collision occurs because no two  
masters can assert SDA at exactly the same time.  
During a Repeated Start condition, a bus collision  
occurs if:  
a) A low level is sampled on SDA when SCL goes  
from low level to high level.  
If SCL goes from high-to-low before the BRG times out  
and SDA has not already been asserted, a bus collision  
occurs. In this case, another master is attempting to  
transmit a data ‘1’ during the Repeated Start condition,  
see Figure 17-30.  
b) SCL goes low before SDA is asserted low,  
indicating that another master is attempting to  
transmit a data ‘1’.  
When the user deasserts SDA and the pin is allowed to  
float high, the BRG is loaded with SSPADD<6:0> and  
counts down to 0. The SCL pin is then deasserted and  
when sampled high, the SDA pin is sampled.  
If, at the end of the BRG time-out, both SCL and SDA  
are still high, the SDA pin is driven low and the BRG is  
reloaded and begins counting. At the end of the count,  
regardless of the status of the SCL pin, the SCL pin is  
driven low and the Repeated Start condition is  
complete.  
FIGURE 17-29:  
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)  
SDA  
SCL  
Sample SDA when SCL goes high.  
If SDA = 0, set BCLIF and release SDA and SCL.  
RSEN  
BCLIF  
Cleared in software  
0’  
S
0’  
SSPIF  
FIGURE 17-30:  
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)  
TBRG  
TBRG  
SDA  
SCL  
SCL goes low before SDA,  
set BCLIF. Release SDA and SCL.  
BCLIF  
RSEN  
Interrupt cleared  
in software  
0’  
S
SSPIF  
DS39631E-page 198  
© 2008 Microchip Technology Inc.