PIC18F2480/2580/4480/4580
REGISTER 24-26: BnSIDL: TX/RX BUFFER n STANDARD IDENTIFIER REGISTERS,
LOW BYTE IN RECEIVE MODE [0 ≤ n ≤ 5, TXnEN (BSEL0<n>) = 0](1)
R-x
R-x
R-x
R-x
R-x
U-0
—
R-x
R-x
SID2
SID1
SID0
SRR
EXID
EID17
EID16
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-5
bit 4
SID<2:0>: Standard Identifier bits (if EXID = 0)
Extended Identifier bits, EID<20:18> (if EXID = 1).
SRR: Substitute Remote Transmission Request bit
This bit is always ‘1’ when EXID = 1or equal to the value of RXRTRRO (BnCON<5>) when EXID = 0.
EXID: Extended Identifier Enable bit
bit 3
1= Received message is an extended identifier frame (SID<10:0> are EID<28:18>)
0= Received message is a standard identifier frame
bit 2
Unimplemented: Read as ‘0’
bit 1-0
EID<17:16>: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
REGISTER 24-27: BnSIDL: TX/RX BUFFER n STANDARD IDENTIFIER REGISTERS,
LOW BYTE IN RECEIVE MODE [0 ≤ n ≤ 5, TXnEN (BSEL0<n>) = 1](1)
R/W-x
SID2
R/W-x
SID1
R/W-x
SID0
U-0
—
R/W-x
EXIDE
U-0
—
R/W-x
EID17
R/W-x
EID16
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-5
SID<2:0>: Standard Identifier bits (if EXIDE = 0)
Extended Identifier bits, EID<20:18> (if EXIDE = 1).
Unimplemented: Read as ‘0’
bit 4
bit 3
EXIDE: Extended Identifier Enable bit
1= Received message is an extended identifier frame (SID<10:0> are EID<28:18>)
0= Received message is a standard identifier frame
bit 2
Unimplemented: Read as ‘0’
bit 1-0
EID<17:16>: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
© 2009 Microchip Technology Inc.
DS39637D-page 303
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