PIC18F2480/2580/4480/4580
TABLE 8-1:
Name
REGISTERS ASSOCIATED WITH DATA EEPROM MEMORY
Reset
Values
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
on Page:
INTCON GIE/GIEH PEIE/GIEL TMR0IE
EEADR EEPROM Address Register
EEDATA EEPROM Data Register
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
55
57
57
57
57
57
58
58
EECON2 EEPROM Control Register 2 (not a physical register)
EECON1 EEPGD
CFGS
CMIP(1)
CMIF(1)
CMIE(1)
—
—
—
—
FREE
EEIP
EEIF
EEIE
WRERR
BCLIP
BCLIF
BCLIE
WREN
HLVDIP
HLVDIF
HLVDIE
WR
RD
IPR2
PIR2
PIE2
OSCFIP
OSCFIF
OSCFIE
TMR3IP ECCP1IP(1)
TMR3IF ECCP1IF(1)
TMR3IE ECCP1IE(1)
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash/EEPROM access.
Note 1: These bits are available in PIC18F4X80 devices and reserved in PIC18F2X80 devices.
© 2009 Microchip Technology Inc.
DS39637D-page 115
MICROCHIP [ MICROCHIP ]
