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PIC18F4520-I/PT 参数 Datasheet PDF下载

PIC18F4520-I/PT图片预览
型号: PIC18F4520-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
To use the In-Circuit Debugger function of the micro-  
controller, the design must implement In-Circuit Serial  
Programming connections to MCLR/VPP/RE3, VDD,  
VSS, RB7 and RB6. This will interface to the In-Circuit  
Debugger module available from Microchip or one of  
the third party development tool companies.  
23.5.2  
DATA EEPROM  
CODE PROTECTION  
The entire data EEPROM is protected from external  
reads and writes by two bits: CPD and WRTD. CPD  
inhibits external reads and writes of data EEPROM.  
WRTD inhibits internal and external writes to data  
EEPROM. The CPU can always read data EEPROM  
under normal operation, regardless of the protection bit  
settings.  
23.9 Single-Supply ICSP Programming  
The LVP Configuration bit enables Single-Supply ICSP  
Programming (formerly known as Low-Voltage ICSP  
Programming or LVP). When Single-Supply Program-  
ming is enabled, the microcontroller can be programmed  
without requiring high voltage being applied to the  
MCLR/VPP/RE3 pin, but the RB5/KBI1/PGM pin is then  
dedicated to controlling Program mode entry and is not  
available as a general purpose I/O pin.  
23.5.3  
CONFIGURATION REGISTER  
PROTECTION  
The Configuration registers can be write-protected.  
The WRTC bit controls protection of the Configuration  
registers. In normal execution mode, the WRTC bit is  
read-only. WRTC can only be written via ICSP or an  
external programmer.  
While programming, using Single-Supply Programming  
mode, VDD is applied to the MCLR/VPP/RE3 pin as in  
normal execution mode. To enter Programming mode,  
VDD is applied to the PGM pin.  
23.6 ID Locations  
Eight memory locations (200000h-200007h) are  
designated as ID locations, where the user can store  
checksum or other code identification numbers. These  
locations are both readable and writable during normal  
execution through the TBLRDand TBLWTinstructions,  
or during program/verify. The ID locations can be read  
when the device is code-protected.  
Note 1: High-voltage programming is always  
available, regardless of the state of the  
LVP bit or the PGM pin, by applying VIHH  
to the MCLR pin.  
2: By default, Single-Supply ICSP is  
enabled in unprogrammed devices (as  
supplied from Microchip) and erased  
devices.  
23.7  
In-Circuit Serial Programming  
3: When Single-Supply Programming is  
enabled, the RB5 pin can no longer be  
used as a general purpose I/O pin.  
PIC18F2420/2520/4420/4520 devices can be serially  
programmed while in the end application circuit. This is  
simply done with two lines for clock and data and three  
other lines for power, ground and the programming  
voltage. This allows customers to manufacture boards  
with unprogrammed devices and then program the  
microcontroller just before shipping the product. This  
also allows the most recent firmware or a custom  
firmware to be programmed.  
4: When LVP is enabled, externally pull the  
PGM pin to VSS to allow normal program  
execution.  
If Single-Supply ICSP Programming mode will not be  
used, the LVP bit can be cleared. RB5/KBI1/PGM then  
becomes available as the digital I/O pin, RB5. The LVP  
bit may be set or cleared only when using standard  
high-voltage programming (VIHH applied to the MCLR/  
VPP/RE3 pin). Once LVP has been disabled, only the  
standard high-voltage programming is available and  
must be used to program the device.  
23.8 In-Circuit Debugger  
When the DEBUG Configuration bit is programmed to  
a ‘0’, the In-Circuit Debugger functionality is enabled.  
This function allows simple debugging functions when  
used with MPLAB® IDE. When the microcontroller has  
this feature enabled, some resources are not available  
for general use. Table 23-4 shows which resources are  
required by the background debugger.  
Memory that is not code-protected can be erased using  
either a block erase, or erased row by row, then written  
at any specified VDD. If code-protected memory is to be  
erased, a block erase is required. If a block erase is to  
be performed when using Low-Voltage Programming,  
the device must be supplied with VDD of 4.5V to 5.5V.  
TABLE 23-4: DEBUGGER RESOURCES  
I/O pins:  
RB6, RB7  
2 levels  
Stack:  
Program Memory:  
Data Memory:  
512 bytes  
10 bytes  
DS39631E-page 266  
© 2008 Microchip Technology Inc.  
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