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PIC18F4520-I/PT 参数 Datasheet PDF下载

PIC18F4520-I/PT图片预览
型号: PIC18F4520-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
The module is enabled by setting the HLVDEN bit.  
Each time that the HLVD module is enabled, the cir-  
cuitry requires some time to stabilize. The IRVST bit is  
a read-only bit and is used to indicate when the circuit  
is stable. The module can only generate an interrupt  
after the circuit is stable and IRVST is set.  
event, depending on the configuration of the module.  
When the supply voltage is equal to the trip point, the  
voltage tapped off of the resistor array is equal to the  
internal reference voltage generated by the voltage  
reference module. The comparator then generates an  
interrupt signal by setting the HLVDIF bit.  
The VDIRMAG bit determines the overall operation of  
the module. When VDIRMAG is cleared, the module  
monitors for drops in VDD below a predetermined set  
point. When the bit is set, the module monitors for rises  
in VDD above the set point.  
The trip point voltage is software programmable to any one  
of 16 values. The trip point is selected by programming the  
HLVDL<3:0> bits (HLVDCON<3:0>).  
The HLVD module has an additional feature that allows  
the user to supply the trip voltage to the module from an  
external source. This mode is enabled when bits,  
HLVDL<3:0>, are set to ‘1111’. In this state, the  
comparator input is multiplexed from the external input  
pin, HLVDIN. This gives users flexibility because it  
allows them to configure the High/Low-Voltage Detect  
interrupt to occur at any voltage in the valid operating  
range.  
22.1 Operation  
When the HLVD module is enabled, a comparator uses  
an internally generated reference voltage as the set  
point. The set point is compared with the trip point,  
where each node in the resistor divider represents a  
trip point voltage. The “trip point” voltage is the voltage  
level at which the device detects a high or low-voltage  
FIGURE 22-1:  
HLVD MODULE BLOCK DIAGRAM (WITH EXTERNAL INPUT)  
Externally Generated  
Trip Point  
VDD  
VDD  
HLVDL<3:0>  
HLVDCON  
Register  
HLVDIN  
VDIRMAG  
HLVDEN  
HLVDIN  
Set  
HLVDIF  
HLVDEN  
BOREN  
Internal Voltage  
Reference  
DS39631E-page 244  
Advance Information  
© 2008 Microchip Technology Inc.