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PIC18F4520-I/PT 参数 Datasheet PDF下载

PIC18F4520-I/PT图片预览
型号: PIC18F4520-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
TABLE 10-7: PORTD I/O SUMMARY  
TRIS  
Setting  
I/O  
Pin  
Function  
I/O  
Description  
Type  
RD0/PSP0  
RD0  
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
O
I
DIG  
ST  
LATD<0> data output.  
PORTD<0> data input.  
PSP0  
RD1  
O
I
DIG  
TTL  
DIG  
ST  
PSP read data output (LATD<0>); takes priority over port data.  
PSP write data input.  
RD1/PSP1  
RD2/PSP2  
RD3/PSP3  
RD4/PSP4  
RD5/PSP5/P1B  
O
I
LATD<1> data output.  
PORTD<1> data input.  
PSP1  
RD2  
O
I
DIG  
TTL  
DIG  
ST  
PSP read data output (LATD<1>); takes priority over port data.  
PSP write data input.  
O
I
LATD<2> data output.  
PORTD<2> data input.  
PSP2  
RD3  
O
I
DIG  
TTL  
DIG  
ST  
PSP read data output (LATD<2>); takes priority over port data.  
PSP write data input.  
O
I
LATD<3> data output.  
PORTD<3> data input.  
PSP3  
RD4  
O
I
DIG  
TTL  
DIG  
ST  
PSP read data output (LATD<3>); takes priority over port data.  
PSP write data input.  
O
I
LATD<4> data output.  
PORTD<4> data input.  
PSP4  
RD5  
O
I
DIG  
TTL  
DIG  
ST  
PSP read data output (LATD<4>); takes priority over port data.  
PSP write data input.  
O
I
LATD<5> data output.  
PORTD<5> data input.  
PSP5  
P1B  
O
I
DIG  
TTL  
DIG  
PSP read data output (LATD<5>); takes priority over port data.  
PSP write data input.  
O
ECCP1 Enhanced PWM output, channel B; takes priority over port and  
PSP data. May be configured for tri-state during Enhanced PWM  
shutdown events.  
RD6/PSP6/P1C  
RD6  
PSP6  
P1C  
0
1
x
x
0
O
I
DIG  
ST  
LATD<6> data output.  
PORTD<6> data input.  
O
I
DIG  
TTL  
DIG  
PSP read data output (LATD<6>); takes priority over port data.  
PSP write data input.  
O
ECCP1 Enhanced PWM output, channel C; takes priority over port and  
PSP data. May be configured for tri-state during Enhanced PWM  
shutdown events.  
RD7/PSP7/P1D  
RD7  
PSP7  
P1D  
0
1
x
x
0
O
I
DIG  
ST  
LATD<7> data output.  
PORTD<7> data input.  
O
I
DIG  
TTL  
DIG  
PSP read data output (LATD<7>); takes priority over port data.  
PSP write data input.  
O
ECCP1 Enhanced PWM output, channel D; takes priority over port and  
PSP data. May be configured for tri-state during Enhanced PWM  
shutdown events.  
Legend:  
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; x= Don’t care  
(TRIS bit does not affect port direction or is overridden for this option).  
© 2008 Microchip Technology Inc.  
DS39631E-page 115  
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