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PIC18F4520-I/P 参数 Datasheet PDF下载

PIC18F4520-I/P图片预览
型号: PIC18F4520-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
FIGURE 16-7:  
EXAMPLE OF FULL-BRIDGE OUTPUT MODE APPLICATION  
V+  
PIC18F4X2X  
QC  
QA  
FET  
Driver  
FET  
Driver  
P1A  
Load  
P1B  
FET  
Driver  
FET  
Driver  
P1C  
P1D  
QD  
QB  
V-  
Figure 16-9 shows an example where the PWM  
direction changes from forward to reverse at a near  
100% duty cycle. At time t1, the outputs P1A and P1D  
become inactive, while output P1C becomes active. In  
this example, since the turn-off time of the power  
devices is longer than the turn-on time, a shoot-through  
current may flow through power devices, QC and QD  
(see Figure 16-7), for the duration of ‘t’. The same  
phenomenon will occur to power devices, QA and QB,  
for PWM direction change from reverse to forward.  
16.4.5.1  
Direction Change in Full-Bridge Mode  
In the Full-Bridge Output mode, the P1M1 bit in the  
CCP1CON register allows user to control the forward/  
reverse direction. When the application firmware  
changes this direction control bit, the module will  
assume the new direction on the next PWM cycle.  
Just before the end of the current PWM period, the  
modulated outputs (P1B and P1D) are placed in their  
inactive state, while the unmodulated outputs (P1A and  
P1C) are switched to drive in the opposite direction.  
This occurs in a time interval of 4 TOSC * (Timer2  
Prescale Value) before the next PWM period begins.  
The Timer2 prescaler will be either 1, 4 or 16, depend-  
ing on the value of the T2CKPS<1:0> bits  
(T2CON<1:0>). During the interval from the switch of  
the unmodulated outputs to the beginning of the next  
period, the modulated outputs (P1B and P1D) remain  
inactive. This relationship is shown in Figure 16-8.  
If changing PWM direction at high duty cycle is required  
for an application, one of the following requirements  
must be met:  
1. Reduce PWM for  
changing directions.  
a PWM period before  
2. Use switch drivers that can drive the switches off  
faster than they can drive them on.  
Other options to prevent shoot-through current may  
exist.  
Note that in the Full-Bridge Output mode, the CCP1  
module does not provide any dead-band delay. In gen-  
eral, since only one output is modulated at all times,  
dead-band delay is not required. However, there is a  
situation where a dead-band delay might be required.  
This situation occurs when both of the following  
conditions are true:  
1. The direction of the PWM output changes when  
the duty cycle of the output is at or near 100%.  
2. The turn-off time of the power switch, including  
the power device and driver circuit, is greater  
than the turn-on time.  
DS39631E-page 154  
© 2008 Microchip Technology Inc.  
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