PIC18F2X1X/4X1X
TABLE 1-3:
Pin Name
MCLR/V
PP
/RE3
MCLR
V
PP
RE3
OSC1/CLKI/RA7
OSC1
CLKI
9
6
PIC18F2410/2415/2510/2515/2610 PINOUT I/O DESCRIPTIONS
Pin Buffer
SPDIP,
QFN Type Type
SOIC
1
26
I
P
I
ST
Pin Number
Description
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
Programming voltage input.
Digital input.
ST
RA7
OSC2/CLKO/RA6
OSC2
CLKO
RA6
10
7
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode; CMOS otherwise.
I CMOS
External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO
pins.)
I/O
TTL
General purpose I/O pin.
O
O
I/O
—
—
TTL
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
General purpose I/O pin.
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I
= Input
O
= Output
P
= Power
Note 1:
Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2:
Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
©
2009 Microchip Technology Inc.
DS39636D-page 15
MICROCHIP [ MICROCHIP TECHNOLOGY ]
