PIC18F45J10 FAMILY
TABLE 1-3:
Pin Name
PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Type Type
Description
PDIP QFN TQFP
PORTD is a bidirectional I/O port or a Parallel Slave
Port (PSP) for interfacing to a microprocessor port.
These pins have TTL input buffers when PSP module
is enabled.
RD0/PSP0/SCK2/
SCL2
19
38
38
RD0
PSP0
SCK2
I/O
I/O
I/O
ST
TTL
ST
Digital I/O.
Parallel Slave Port data.
Synchronous serial clock input/output for
SPI mode.
SCL2
I/O
ST
Synchronous serial clock input/output for
I2C™ mode.
RD1/PSP1/SDI2/SDA2 20
39
39
RD1
I/O
I/O
I
ST
TTL
ST
Digital I/O.
PSP1
SDI2
SDA2
Parallel Slave Port data.
SPI data in.
I/O
ST
I2C data I/O.
RD2/PSP2/SDO2
RD2
21
22
40
41
40
41
I/O
I/O
O
ST
TTL
—
Digital I/O.
Parallel Slave Port data.
SPI data out.
PSP2
SDO2
RD3/PSP3/SS2
RD3
I/O
I/O
I
ST
TTL
TTL
Digital I/O.
Parallel Slave Port data.
SPI slave select input.
PSP3
SS2
RD4/PSP4
RD4
27
28
2
3
2
3
I/O
I/O
ST
TTL
Digital I/O.
Parallel Slave Port data.
PSP4
RD5/PSP5/P1B
RD5
I/O
I/O
O
ST
TTL
—
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
PSP5
P1B
RD6/PSP6/P1C
RD6
29
30
4
5
4
5
I/O
I/O
O
ST
TTL
—
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
PSP6
P1C
RD7/PSP7/P1D
RD7
I/O
I/O
O
ST
TTL
—
Digital I/O.
Parallel Slave Port data.
Enhanced CCP1 output.
PSP7
P1D
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
DS39682E-page 20
© 2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
