PIC18F2450/4450
TABLE 1-3:
Pin Name
PIC18F4450 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Type Type
Description
PDIP QFN TQFP
PORTE is a bidirectional I/O port.
RE0/AN5
RE0
8
9
25
26
27
—
25
26
27
—
I/O
I
ST
Analog
Digital I/O.
Analog input 5.
AN5
RE1/AN6
RE1
I/O
I
ST
Analog
Digital I/O.
Analog input 6.
AN6
RE2/AN7
RE2
10
I/O
I
ST
Analog
Digital I/O.
Analog input 7.
AN7
RE3
VSS
—
—
P
—
—
See MCLR/VPP/RE3 pin.
12, 31 6, 30, 6, 29
31
Ground reference for logic and I/O pins.
VDD
11, 32 7, 8, 7, 28
28, 29
P
—
—
Positive supply for logic and I/O pins.
VUSB
NC/ICCK/ICPGC(1)
18
—
37
—
37
12
O
Internal USB 3.3V voltage regulator output.
No Connect or dedicated ICD/ICSP™ port clock.
In-Circuit Debugger clock.
ICCK
ICPGC
I/O
I/O
ST
ST
ICSP programming clock.
NC/ICDT/ICPGD(1)
—
—
—
—
—
—
—
13
13
33
34
—
No Connect or dedicated ICD/ICSP port clock.
In-Circuit Debugger data.
ICDT
ICPGD
I/O
I/O
ST
ST
ICSP programming data.
(1)
NC/ICRST/ICVPP
No Connect or dedicated ICD/ICSP port Reset.
Master Clear (Reset) input.
ICRST
ICVPP
NC/ICPORTS(1)
ICPORTS
I
P
—
—
Programming voltage input.
P
—
No Connect or 28-pin device emulation.
Enable 28-pin device emulation when connected
to VSS.
NC
—
—
No Connect.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
© 2006 Microchip Technology Inc.
Advance Information
DS39760A-page 21
MICROCHIP [ MICROCHIP ]
