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PIC18F2420-I/ML 参数 Datasheet PDF下载

PIC18F2420-I/ML图片预览
型号: PIC18F2420-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC18F2420/2520/4420/4520
28/40/44-Pin Enhanced Flash Microcontrollers with
10-Bit A/D and nanoWatt Technology
Power Management Features:
Run: CPU on, Peripherals on
Idle: CPU off, Peripherals on
Sleep: CPU off, Peripherals off
Ultra Low 50nA Input Leakage
Run mode Currents Down to 11
μA
Typical
Idle mode Currents Down to 2.5
μA
Typical
Sleep mode Current Down to 100 nA Typical
Timer1 Oscillator: 900 nA, 32 kHz, 2V
Watchdog Timer: 1.4
μA,
2V Typical
Two-Speed Oscillator Start-up
Peripheral Highlights (Continued):
• Master Synchronous Serial Port (MSSP) module
Supporting 3-Wire SPI (all 4 modes) and I
2
C™
Master and Slave modes
• Enhanced Addressable USART module:
- Supports RS-485, RS-232 and LIN/J2602
- RS-232 operation using internal oscillator
block (no external crystal required)
- Auto-wake-up on Start bit
- Auto-Baud Detect
• 10-Bit, up to 13-Channel Analog-to-Digital (A/D)
Converter module:
- Auto-acquisition capability
- Conversion available during Sleep
• Dual Analog Comparators with Input Multiplexing
• Programmable 16-Level High/Low-Voltage
Detection (HLVD) module:
- Supports interrupt on High/Low-Voltage Detection
Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4x Phase Lock Loop (PLL) – Available for Crystal
and Internal Oscillators
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal Oscillator Block:
- Fast wake from Sleep and Idle, 1
μs
typical
- 8 use-selectable frequencies, from 31 kHz to
8 MHz
- Provides a complete range of clock speeds
from 31 kHz to 32 MHz when used with PLL
- User-tunable to compensate for frequency drift
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock stops
Special Microcontroller Features:
• C Compiler Optimized Architecture:
- Optional extended instruction set designed to
optimize re-entrant code
• 100,000 Erase/Write Cycle Enhanced Flash
Program Memory Typical
• 1,000,000 Erase/Write Cycle Data EEPROM
Memory Typical
• Flash/Data EEPROM Retention: 100 Years Typical
• Self-Programmable under Software Control
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-Supply 5V In-Circuit Serial
Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) via Two Pins
• Wide Operating Voltage Range: 2.0V to 5.5V
• Programmable Brown-out Reset (BOR) with
Software Enable Option
CCP/
ECCP
(PWM)
2/0
2/0
1/1
1/1
MSSP
SPI
Y
Y
Y
Y
Master
I
2
C™
Y
Y
Y
Y
EUSART
Peripheral Highlights:
High-Current Sink/Source 25 mA/25 mA
Three Programmable External Interrupts
Four Input Change Interrupts
Up to 2 Capture/Compare/PWM (CCP) modules,
one with Auto-Shutdown (28-pin devices)
• Enhanced Capture/Compare/PWM (ECCP)
module (40/44-pin devices only):
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-shutdown and auto-restart
-
Program Memory
Device
PIC18F2420
PIC18F2520
PIC18F4420
PIC18F4520
Data Memory
I/O
25
25
36
36
Flash # Single-Word SRAM EEPROM
(bytes) Instructions (bytes) (bytes)
16K
32K
16K
32K
8192
16384
8192
16384
768
1536
768
1536
256
256
256
256
10-Bit
A/D (ch)
10
10
13
13
Comp.
2
2
2
2
Timers
8/16-Bit
1/3
1/3
1/3
1/3
1
1
1
1
©
2008 Microchip Technology Inc.
DS39631E-page 1