PIC18F45J10 FAMILY
16.4.12 ACKNOWLEDGE SEQUENCE
TIMING
16.4.13 STOP CONDITION TIMING
A Stop bit is asserted on the SDAx pin at the end of a
receive/transmit by setting the Stop Sequence Enable
bit, PEN (SSPxCON2<2>). At the end of
An Acknowledge sequence is enabled by setting the
Acknowledge Sequence Enable bit, ACKEN
(SSPxCON2<4>). When this bit is set, the SCLx pin is
pulled low and the contents of the Acknowledge data bit
are presented on the SDAx pin. If the user wishes to
generate an Acknowledge, then the ACKDT bit should
be cleared. If not, the user should set the ACKDT bit
before starting an Acknowledge sequence. The Baud
Rate Generator then counts for one rollover period
(TBRG) and the SCLx pin is deasserted (pulled high).
When the SCLx pin is sampled high (clock arbitration),
the Baud Rate Generator counts for TBRG. The SCLx pin
is then pulled low. Following this, the ACKEN bit is auto-
matically cleared, the Baud Rate Generator is turned off
and the MSSP module then goes into Idle mode
(Figure 16-23).
a
receive/transmit, the SCLx line is held low after the fall-
ing edge of the ninth clock. When the PEN bit is set, the
master will assert the SDAx line low. When the SDAx
line is sampled low, the Baud Rate Generator is
reloaded and counts down to 0. When the Baud Rate
Generator times out, the SCLx pin will be brought high
and one TBRG (Baud Rate Generator rollover count)
later, the SDAx pin will be deasserted. When the SDAx
pin is sampled high while SCLx is high, the P bit
(SSPxSTAT<4>) is set. A TBRG later, the PEN bit is
cleared and the SSPxIF bit is set (Figure 16-24).
16.4.13.1 WCOL Status Flag
If the user writes the SSPxBUF when a Stop sequence
is in progress, then the WCOL bit is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
16.4.12.1 WCOL Status Flag
If the user writes the SSPxBUF when an Acknowledge
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
FIGURE 16-23:
ACKNOWLEDGE SEQUENCE WAVEFORM
Acknowledge sequence starts here,
write to SSPxCON2
ACKEN automatically cleared
ACKEN = 1, ACKDT = 0
TBRG
ACK
TBRG
SDAx
SCLx
D0
8
9
SSPxIF
Cleared in
software
SSPxIF set at the end
of Acknowledge sequence
SSPxIF set at
the end of receive
Cleared in
software
Note: TBRG = one Baud Rate Generator period.
© 2009 Microchip Technology Inc.
DS39682E-page 185
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