PIC18F45J10 FAMILY
TABLE 1-3:
Pin Name
PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS
Pin Number
Pin Buffer
Type Type
Description
PDIP QFN TQFP
MCLR
MCLR
1
18
32
18
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
I
ST
OSC1/CLKI
OSC1
13
30
Oscillator crystal or external clock input.
I
I
—
CMOS
Oscillator crystal input or external clock source input.
External clock source input. Always associated with
pin function OSC1. See related OSC2/CLKO pins.
CLKI
OSC2/CLKO
OSC2
14
33
31
Oscillator crystal or clock output.
O
O
—
—
Oscillator crystal output. Connects to crystal
or resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO which
has 1/4 the frequency of OSC1 and denotes
the instruction cycle rate.
CLKO
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
DS39682E-page 16
© 2009 Microchip Technology Inc.
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