PIC18FXX20
FIGURE 11-1:
TIMER0 BLOCK DIAGRAM IN 8-BIT MODE
Data Bus
TMR0
FOSC/4
0
1
8
0
Sync with
Internal
Clocks
RA4/T0CKI pin
Programmable
Prescaler
1
(2 TCY delay)
T0SE
3
PSA
Set Interrupt
Flag bit TMR0IF
on Overflow
T0PS2, T0PS1, T0PS0
T0CS
Note: Upon RESET, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
FIGURE 11-2:
TIMER0 BLOCK DIAGRAM IN 16-BIT MODE
FOSC/4
0
0
Sync with
Set Interrupt
Flag bit TMR0IF
on Overflow
TMR0
Internal
Clocks
1
TMR0L
High Byte
Programmable
Prescaler
T0CKI pin
1
8
(2 TCY delay)
T0SE
3
Read TMR0L
Write TMR0L
PSA
T0PS2, T0PS1, T0PS0
T0CS
8
8
TMR0H
8
Data Bus<7:0>
Note: Upon RESET, Timer0 is enabled in 8-bit mode with clock input from T0CKI max. prescale.
DS39609A-page 132
Advance Information
2003 Microchip Technology Inc.
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