PIC18FXX20
INDEX
A
Block Diagrams
16-bit Byte Select Mode ............................................. 75
16-bit Byte Write Mode .............................................. 73
16-bit Word Write Mode ............................................. 74
A/D ........................................................................... 216
Analog Input Model .................................................. 217
Baud Rate Generator .............................................. 183
Capture Mode Operation ......................................... 151
Comparator Analog Input Model .............................. 227
Comparator I/O Operating Modes (Diagram) .......... 224
Comparator Output .................................................. 226
Comparator Voltage Reference ............................... 230
Compare Mode Operation ....................................... 152
Low Voltage Detect (LVD) ....................................... 234
Low Voltage Detect (LVD) with External Input ......... 234
A/D ................................................................................... 213
A/D Converter Interrupt, Configuring ....................... 217
Acquisition Requirements ........................................ 218
Acquisition Time ....................................................... 218
ADCON0 Register .................................................... 213
ADCON1 Register .................................................... 213
ADCON2 Register .................................................... 213
ADRESH Register ............................................ 213, 216
ADRESL Register ............................................ 213, 216
Analog Port Pins ...................................................... 128
Analog Port Pins, Configuring .................................. 219
Associated Register Summary ................................. 221
Calculating Minimum Required
Acquisition Time (Example) ............................. 218
CCP2 Trigger ........................................................... 220
Configuring the Module ............................................ 217
Conversion Clock (TAD) ........................................... 219
Conversion Requirements ....................................... 340
Conversion Status (GO/DONE Bit) .......................... 216
Conversion Tad Cycles ............................................ 220
Conversions ............................................................. 220
Converter Characteristics ........................................ 339
Equations ................................................................. 218
Minimum Charging Time .......................................... 218
Special Event Trigger (CCP) .................................... 152
Special Event Trigger (CCP2) .................................. 220
TAD vs. Device Operating Frequencies (Table) ....... 219
Absolute Maximum Ratings ............................................. 307
AC (Timing) Characteristics ............................................. 320
Load Conditions for Device Timing
Specifications ................................................... 321
Parameter Symbology ............................................. 320
Temperature and Voltage Specifications ................. 321
Timing Conditions .................................................... 321
ACKSTAT Status Flag ..................................................... 187
ADCON0 Register ............................................................ 213
GO/DONE Bit ........................................................... 216
ADCON1 Register ............................................................ 213
ADCON2 Register ............................................................ 213
ADDLW ............................................................................ 265
Addressable Universal Synchronous Asynchronous
Receiver Transmitter (USART) ................................ 197
ADDWF ............................................................................ 265
ADDWFC ......................................................................... 266
ADRESH Register .................................................... 213, 216
ADRESL Register .................................................... 213, 216
Analog-to-Digital Converter. See A/D
2
MSSP (I C Master Mode) ........................................ 181
2
MSSP (I C Mode) .................................................... 166
MSSP (SPI Mode) ................................................... 157
On-Chip Reset Circuit ................................................ 29
PIC18F6X20 Architecture ............................................ 9
PIC18F8X20 Architecture .......................................... 10
PLL ............................................................................ 23
PORT/LAT/TRIS Operation ..................................... 103
PORTA
RA3:RA0 and RA5 Pins ................................... 104
RA4/T0CKI Pin ................................................ 104
RA6 Pin (as I/O) .............................................. 104
PORTB
RB2:RB0 Pins .................................................. 107
RB3 Pin ........................................................... 107
RB7:RB4 Pins .................................................. 106
PORTC (Peripheral Output Override) ...................... 109
PORTD and PORTE
Parallel Slave Port ........................................... 128
PORTD in I/O Port Mode ......................................... 111
PORTD in System Bus Mode .................................. 112
PORTE in I/O Mode ................................................. 115
PORTE in System Bus Mode .................................. 115
PORTF
RF1/AN6/C2OUT and
RF2/AN5/C1OUT Pins ............................. 117
RF6/RF3 and RF0 Pins ................................... 118
RF7 Pin ............................................................ 118
PORTG (Peripheral Output Override) ...................... 120
PORTH
RH3:RH0 Pins in System Bus Mode ............... 123
RH3:RH0 Pins in I/O Mode .............................. 122
RH7:RH4 Pins in I/O Mode .............................. 122
PORTJ
ANDLW ............................................................................ 266
ANDWF ............................................................................ 267
Assembler
RJ4:RJ0 Pins in System Bus Mode ................. 126
RJ7:RJ6 Pins in System Bus Mode ................. 126
PORTJ in I/O Mode ................................................. 125
PWM Operation (Simplified) .................................... 154
Reads from FLASH Program Memory ....................... 65
Single Comparator ................................................... 225
Table Read Operation ............................................... 61
Table Write Operation ................................................ 62
Table Writes to FLASH Program Memory ................. 67
Timer0 in 16-bit Mode .............................................. 132
Timer0 in 8-bit Mode ................................................ 132
MPASM Assembler .................................................. 301
B
Baud Rate Generator ....................................................... 183
BC .................................................................................... 267
BCF .................................................................................. 268
BF Status Flag ................................................................. 187
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 351
MICROCHIP [ MICROCHIP ]
