PIC18F2331/2431/4331/4431
REGISTER 3-2:
OSCCON: OSCILLATOR CONTROL REGISTER
R/W-0
IDLEN
bit 7
R/W-0
IRCF2
R/W-0
IRCF1
R/W-0
IRCF0
R(1)
R-0
R/W-0
SCS1
R/W-0
SCS0
OSTS
IOFS
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
IDLEN: Idle Enable bit
1= Idle mode enabled; CPU core is not clocked in power-managed modes
0= Run mode enabled; CPU core is clocked in power-managed modes
bit 6-4
IRCF<2:0>: Internal Oscillator Frequency Select bits
111= 8 MHz (8 MHz source drives clock directly)
110= 4 MHz (default)
101= 2 MHz
100= 1 MHz
011= 500 kHz
010= 250 kHz
001= 125 kHz
000= 31 kHz (INTRC source drives clock directly)(2)
bit 3
OSTS: Oscillator Start-up Timer Time-out Status bit(1)
1= Oscillator Start-up Timer time-out has expired; primary oscillator is running
0= Oscillator Start-up Timer time-out is running; primary oscillator is not ready
bit 2
IOFS: INTOSC Frequency Stable bit
1= INTOSC frequency is stable
0= INTOSC frequency is not stable
bit 1-0
SCS<1:0>: System Clock Select bits
1x= Internal oscillator block
01= Secondary (Timer1) oscillator
00= Primary oscillator
Note 1: Depends on the state of the IESO bit in Configuration Register 1H.
2: Default output frequency of INTOSC on Reset.
DS39616D-page 36
2010 Microchip Technology Inc.
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