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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
CPFSGT  
Compare f with W, Skip if f > W  
CPFSLT  
Compare f with W, Skip if f < W  
Syntax:  
[ label ] CPFSGT f [,a]  
Syntax:  
[ label ] CPFSLT f [,a]  
Operands:  
0 f 255  
a [0,1]  
Operands:  
0 f 255  
a [0,1]  
Operation:  
(f) W),  
Operation:  
(f) –W),  
skip if (f) > (W)  
skip if (f) < (W)  
(unsigned comparison)  
(unsigned comparison)  
Status Affected:  
Encoding:  
None  
Status Affected:  
Encoding:  
None  
0110  
010a  
ffff  
ffff  
0110  
000a  
ffff  
ffff  
Description:  
Compares the contents of data memory  
location, ‘f’, to the contents of the W by  
performing an unsigned subtraction.  
If the contents of ‘f’ are greater than the  
contents of WREG, then the fetched  
instruction is discarded and a NOPis  
executed instead, making this a two-  
cycle instruction. If ‘a’ is ‘0’, the Access  
Bank will be selected, overriding the  
BSR value. If ‘a’ = 1, then the bank will  
be selected as per the BSR value.  
Description:  
Compares the contents of data memory  
location, ‘f’, to the contents of W by  
performing an unsigned subtraction.  
If the contents of ‘f’ are less than the  
contents of W, then the fetched  
instruction is discarded and a NOPis  
executed instead, making this a  
two-cycle instruction. If ‘a’ is ‘0’, the  
Access Bank will be selected. If ‘a’ is ‘1’,  
the BSR will not be overridden.  
Words:  
Cycles:  
1
Words:  
Cycles:  
1
1(2)  
1(2)  
Note: 3 cycles if skip and followed  
by a 2-word instruction.  
Note: 3 cycles if skip and followed  
by a 2-word instruction.  
Q Cycle Activity:  
Q1  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
Process  
Data  
No  
operation  
Decode  
Read  
register ‘f’  
Process  
Data  
No  
operation  
If skip:  
Q1  
If skip:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
If skip and followed by 2-word instruction:  
If skip and followed by 2-word instruction:  
Q1  
Q2  
Q3  
Q4  
Q1  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
Example:  
HERE  
NLESS  
LESS  
CPFSLT REG  
:
:
Example:  
HERE  
CPFSGT REG  
NGREATER  
GREATER  
:
:
Before Instruction  
Before Instruction  
PC  
W
=
=
Address (HERE)  
?
PC  
W
=
=
Address (HERE)  
?
After Instruction  
After Instruction  
If REG  
PC  
If REG  
PC  
<
=
=
W;  
If REG  
PC  
If REG  
PC  
=
=
W;  
Address (LESS)  
W;  
Address (NLESS)  
Address (GREATER)  
W;  
Address (NGREATER)  
2010 Microchip Technology Inc.  
DS39616D-page 301  
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