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PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
REGISTER 18-8: FLTCONFIG: FAULT CONFIGURATION REGISTER  
R/W-0  
R/W-0  
FLTBS(1)  
R/W-0  
R/W-0  
R/W-0  
FLTCON(2)  
R/W-0  
FLTAS  
R/W-0  
R/W-0  
BRFEN  
FLTBMOD(1) FLTBEN(1)  
FLTAMOD  
FLTAEN  
bit 7  
bit 0  
Legend:  
R = Readable bit  
-n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
bit 7  
bit 6  
BRFEN: Breakpoint Fault Enable bit  
1= Enable Fault condition on a breakpoint (i.e., only when PWMPIN = 1)  
0= Disable Fault condition  
FLTBS: Fault B Status bit(1)  
1= FLTB is asserted:  
if FLTBMOD = 0, cleared by the user;  
if FLTBMOD = 1, cleared automatically at beginning of the new period when FLTB is deasserted  
0= No Fault  
bit 5  
FLTBMOD: Fault B Mode bit(1)  
1= Cycle-by-Cycle mode: Pins are inactive for the remainder of the current PWM period or until FLTB  
is deasserted; FLTBS is cleared automatically when FLTB is inactive (no Fault present)  
0= Inactive mode: Pins are deactivated (catastrophic failure) until FLTB is deasserted and FLTBS is  
cleared by the user only  
bit 4  
bit 3  
bit 2  
FLTBEN: Fault B Enable bit(1)  
1= Enable Fault B  
0= Disable Fault B  
FLTCON: Fault Configuration bit(2)  
1= FLTA, FLTB or both deactivates all PWM outputs  
0= FLTA or FLTB deactivates PWM<5:0>  
FLTAS: Fault A Status bit  
1= FLTA is asserted:  
if FLTAMOD = 0, cleared by the user;  
if FLTAMOD = 1, cleared automatically at beginning of the new period when FLTA is deasserted  
0= No Fault  
bit 1  
bit 0  
FLTAMOD: Fault A Mode bit  
1= Cycle-by-Cycle mode: Pins are inactive for the remainder of the current PWM period or until FLTA is  
deasserted; FLTAS is cleared automatically  
0= Inactive mode: Pins are deactivated (catastrophic failure) until FLTA is deasserted and FLTAS is  
cleared by the user only  
FLTAEN: Fault A Enable bit  
1= Enable Fault A  
0= Disable Fault A  
Note 1: Unimplemented in PIC18F2331/2431 devices; maintain these bits clear.  
2: PWM<7:6> are implemented only on PIC18F4331/4431 devices. On PIC18F2331/2431 devices, setting or  
clearing FLTCON has no effect.  
2010 Microchip Technology Inc.  
DS39616D-page 201  
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