PIC18F2331/2431/4331/4431
TABLE 1-3:
Pin Name
PIC18F4331/4431 PINOUT I/O DESCRIPTIONS
Pin Number
Pin Buffer
Type Type
Description
PDIP TQFP QFN
MCLR/VPP/RE3
MCLR
1
18
18
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
I
ST
ST
VPP
RE3
P
I
Programming voltage input.
Digital input. Available only when MCLR is disabled.
OSC1/CLKI/RA7
OSC1
13
30
32
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode; CMOS otherwise.
External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO
pins.)
I
I
ST
CLKI
CMOS
RA7
I/O
TTL
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
14
31
33
Oscillator crystal or clock output.
O
O
—
—
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
General purpose I/O pin.
CLKO
RA6
I/O
TTL
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: RC3 is the alternate pin for T0CKI/T5CKI; RC4 is the alternate pin for SDI/SDA; RC5 is the alternate pin
for SCK/SCL; RC7 is the alternate pin for SDO.
2: RD4 is the alternate pin for FLTA.
3: RD5 is the alternate pin for PWM4.
2010 Microchip Technology Inc.
DS39616D-page 19