欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F4431-I/P的Datasheet PDF文件第166页浏览型号PIC18F4431-I/P的Datasheet PDF文件第167页浏览型号PIC18F4431-I/P的Datasheet PDF文件第168页浏览型号PIC18F4431-I/P的Datasheet PDF文件第169页浏览型号PIC18F4431-I/P的Datasheet PDF文件第171页浏览型号PIC18F4431-I/P的Datasheet PDF文件第172页浏览型号PIC18F4431-I/P的Datasheet PDF文件第173页浏览型号PIC18F4431-I/P的Datasheet PDF文件第174页  
PIC18F2331/2431/4331/4431  
FIGURE 17-14:  
NOISE FILTER TIMING DIAGRAM (CLOCK DIVIDER = 1:1)  
TQEI = 16 TCY  
TCY  
(3)  
(3)  
Noise Glitch  
Noise Glitch  
(1)  
CAP1/INDX Pin  
(input to filter)  
(2)  
CAP1/INDX Input  
(output from filter)  
TGD = 3 TCY  
Note 1: Only the CAP1/INDX pin input is shown for simplicity. Similar event timing occurs on the CAP2/QEA and  
CAP3/QEB pins.  
2: Noise filtering occurs in the shaded portions of the CAP1 input.  
3: Filter’s group delay: TGD = 3 TCY.  
17.4 IC and QEI Shared Interrupts  
17.5 Operation in Sleep Mode  
The IC and QEI submodules can each generate three  
distinct interrupt signals; however, they share the use  
of the same three interrupt flags in register, PIR3. The  
meaning of a particular interrupt flag at any given time  
depends on which module is active at the time the  
interrupt is set. The meaning of the flags in context are  
summarized in Table 17-7.  
17.5.1  
3x INPUT CAPTURE IN SLEEP  
MODE  
Since the input capture can operate only when its time  
base is configured in a Synchronous mode, the input  
capture will not capture any events. This is because the  
device’s internal clock has been stopped and any inter-  
nal timers in Synchronous modes will not increment.  
The prescaler will continue to count the events (not  
synchronized).  
When the IC submodule is active, the three flags (IC1IF,  
IC2QEIF and IC3DRIF) function as interrupt-on-capture  
event flags for their respective input capture channels.  
The channel must be configured for one of the events  
that will generate an interrupt (see Section 17.1.7 “IC  
Interrupts” for more information).  
When the specified capture event occurs, the CAPx  
interrupt will be set. The Capture Buffer register will be  
updated upon wake-up from sleep to the current TMR5  
value. If the CAPx interrupt is enabled, the device will  
wake-up from Sleep. This effectively enables all input  
capture channels to be used as the external interrupts.  
When the QEI is enabled, the IC1IF interrupt flag  
indicates an interrupt caused by  
a
velocity  
measurement event, usually an update of the VELR  
register. The IC2QEIF interrupt indicates that a position  
measurement event has occurred. IC3DRIF indicates  
that a direction change has been detected.  
17.5.2  
QEI IN SLEEP MODE  
All QEI functions are halted in Sleep mode.  
TABLE 17-7: MEANING OF IC AND QEI  
INTERRUPT FLAGS  
Meaning  
Interrupt  
Flag  
IC Mode  
QEI Mode  
IC1IF  
IC1 Capture Event Velocity Register Update  
IC2QEIF IC2 Capture Event Position Measurement  
Update  
IC3DRIF IC3 Capture Event  
Direction Change  
DS39616D-page 170  
2010 Microchip Technology Inc.