PIC18F2331/2431/4331/4431
FIGURE 17-11:
QEI MODULE RESET TIMING WITH THE INDEX INPUT
Forward
Note 2
Reverse
Note 2
QEA
QEB
-1 -1 -1 -1
-1 -1 -1 -1
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
Count (+/-)
(1)
POSCNT
MAXCNT
INDX
MAXCNT = 1527
Note 6
IC2QEIF
UP/DOWN
(3)
(3)
Q4
Q4
(5)
(4)
Q1
Q1
Position
Counter Load
Note 1: POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals).
2: When an INDX Reset pulse is detected, POSCNT is reset to ‘0’ on the next QEA or QEB edge. POSCNT is set to
MAXCNT when POSCNT = 0(when decrementing), which occurs on the next QEA or QEB edge. a similar Reset
sequence occurs for the reverse direction, except that the INDX signal is recognized on its falling edge. The Reset
is generated on the next QEA or QEB edge.
3: IC2QEIF is enabled for one TCY clock cycle.
4: The position counter is loaded with 0000h (i.e., Reset) on the next QEA or QEB edge when the INDX is high.
5: The position counter is loaded with a MAXCNT value (e.g., 1527h) on the next QEA or QEB edge following the
INDX falling edge input signal detect).
6: IC2QEIF must be cleared in software.
DS39616D-page 166
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
