PIC18F2331/2431/4331/4431
TABLE 16-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Reset Values
on Page:
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
TXIF
RBIE
SSPIF
SSPIE
SSPIP
TMR0IF INT0IF
RBIF
54
57
57
57
57
55
55
55
56
56
56
56
56
56
57
57
57
—
—
—
ADIF
ADIE
ADIP
RCIF
RCIE
RCIP
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
PIE1
TXIE
TXIP
IPR1
TRISC
TMR1L
TMR1H
T1CON
PORTC Data Direction Register
Timer1 Register Low Byte
Timer1 Register High Byte
RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
CCPR1L Capture/Compare/PWM Register 1 Low Byte
CCPR1H Capture/Compare/PWM Register 1 High Byte
CCP1CON
CCPR2L
—
—
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
Capture/Compare/PWM Register 2 Low Byte
CCPR2H Capture/Compare/PWM Register 2 High Byte
CCP2CON
PIR2
—
—
—
—
—
DC2B1
—
DC2B0
EEIF
CCP2M3 CCP2M2 CCP2M1 CCP2M0
OSCFIF
OSCFIE
OSCFIP
—
—
—
LVDIF
LVDIE
LVDIP
—
—
—
CCP2IF
CCP2IE
CCP2IP
PIE2
—
EEIE
IPR2
—
EEIP
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture, Compare and Timer1.
DS39616D-page 148
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
