PIC18F2331/2431/4331/4431
FIGURE 1-1:
PIC18F2331/2431 (28-PIN) BLOCK DIAGRAM
Data Bus<8>
PORTA
PORTB
PORTC
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CAP1/INDX
RA3/AN3/VREF+/CAP2/QEA
RA4/AN4/CAP3/QEB
OSC2/CLKO/RA6
Table Pointer<21>
inc/dec logic
Data Latch
21
8
8
Data RAM
(768 bytes)
21
21
Address Latch
12
OSC1/CLKI/RA7
20
PCLATU PCLATH
Address Latch
Program
Memory
Address<12>
PCU PCH PCL
Program Counter
4
BSR
12
FSR0
4
RB0/PWM0
RB1/PWM1
RB2/PWM2
RB3/PWM3
RB4/KBI0/PWM5
RB5/KBI1/PWM4/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Data Latch
Bank 0, F
FSR1
FSR2
31 Level Stack
12
16
inc/dec
logic
Decode
Table Latch
8
ROM Latch
IR
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2/FLTA
RC2/CCP1
RC3/T0CKI/T5CKI/INT0
RC4/INT1/SDI/SDA
RC5/INT2/SCK/SCL
RC6/TX/CK/SS
8
Instruction
Decode &
Control
RC7/RX/DT/SDO
PRODH PRODL
8 x 8 Multiply
3
Power-up
Timer
OSC2/CLKO
OSC1/CLKI
T1OSI
8
Timing
W
8
BITOP
8
Oscillator
Start-up Timer
Generation
8
Power-on
Reset
8
T1OSO
4x PLL
ALU<8>
Watchdog
Timer
8
Precision
Band Gap
Reference
Brown-out
Reset
PORTE
Power-Managed
Mode Logic
MCLR/VPP
INTRC
OSC
MCLR/VPP
VDD, VSS
Timer0
HS 10-Bit
ADC
Timer1
Timer2
AVDD, AVSS
Timer5
Synchronous
Serial Port
CCP1
CCP2
EUSART
Data EE
PCPWM
MFM
DS39616D-page 14
2010 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
