PIC18F2331/2431/4331/4431
REGISTER 10-11: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
U-0
—
U-0
—
R/W-1
EEIP
U-0
—
R/W-1
LVDIP
U-0
—
R/W-1
OSCFIP
CCP2IP
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1= High priority
0= Low priority
bit 6-5
bit 4
Unimplemented: Read as ‘0’
EEIP: Interrupt Priority bit
1= High priority
0= Low priority
bit 3
bit 2
Unimplemented: Read as ‘0’
LVDIP: Low-Voltage Detect Interrupt Priority bit
1= High priority
0= Low priority
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP2IP: CCP2 Interrupt Priority bit
1= High priority
0= Low priority
2010 Microchip Technology Inc.
DS39616D-page 109
MICROCHIP [ MICROCHIP ]
