PIC18F2331/2431/4331/4431
REGISTER 10-8: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0
U-0
—
U-0
—
R/W-0
EEIE
U-0
—
R/W-0
LVDIE
U-0
—
R/W-0
OSCFIE
CCP2IE
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
OSCFIE: Oscillator Fail Interrupt Enable bit
1= Enabled
0= Disabled
bit 6-5
bit 4
Unimplemented: Read as ‘0’
EEIE: Interrupt Enable bit
1= Enabled
0= Disabled
bit 3
bit 2
Unimplemented: Read as ‘0’
LVDIE: Low-Voltage Detect Interrupt Enable bit
1= Enabled
0= Disabled
bit 1
bit 0
Unimplemented: Read as ‘0’
CCP2IE: CCP2 Interrupt Enable bit
1= Enabled
0= Disabled
DS39616D-page 106
2010 Microchip Technology Inc.