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PIC18F4431-I/PT 参数 Datasheet PDF下载

PIC18F4431-I/PT图片预览
型号: PIC18F4431-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2331/2431/4331/4431  
The program memory space is 16 bits wide, while the  
8.0  
FLASH PROGRAM MEMORY  
data RAM space is 8 bits wide. Table reads and table  
writes move data between these two memory spaces  
through an 8-bit register (TABLAT).  
The Flash program memory is readable, writable and  
erasable during normal operation over the entire VDD  
range.  
Table read operations retrieve data from program  
memory and place it into TABLAT in the data RAM  
space. Figure 8-1 shows the operation of a table read  
with program memory and data RAM.  
A read from program memory is executed on one byte  
at a time. A write to program memory is executed on  
blocks of 8 bytes at a time. Program memory is erased  
in blocks of 64 bytes at a time. A bulk erase operation  
may not be issued from user code.  
Table write operations store data from TABLAT in the  
data memory space into holding registers in program  
memory. The procedure to write the contents of the  
holding registers into program memory is detailed in  
Section 8.5 “Writing to Flash Program Memory”.  
Figure 8-2 shows the operation of a table write with  
program memory and data RAM.  
While writing or erasing program memory, instruction  
fetches cease until the operation is complete. The  
program memory cannot be accessed during the write  
or erase, therefore, code cannot execute. An internal  
programming timer terminates program memory writes  
and erases.  
Table operations work with byte entities. A table block  
containing data, rather than program instructions, is not  
required to be word-aligned. Therefore, a table block can  
start and end at any byte address. If a table write is being  
used to write executable code into program memory,  
program instructions will need to be word-aligned,  
(TBLPTRL<0> = 0).  
A value written to program memory does not need to be  
a valid instruction. Executing a program memory  
location that forms an invalid instruction results in a  
NOP.  
8.1  
Table Reads and Table Writes  
In order to read and write program memory, there are  
two operations that allow the processor to move bytes  
between the program memory space and the data  
RAM:  
Table Read (TBLRD)  
Table Write (TBLWT)  
FIGURE 8-1:  
TABLE READ OPERATION  
Instruction: TBLRD*  
(1)  
Program Memory  
Table Pointer  
Table Latch (8-bit)  
TABLAT  
TBLPTRU TBLPTRH TBLPTRL  
Program Memory  
(TBLPTR)  
Note 1: The Table Pointer points to a byte in program memory.  
2010 Microchip Technology Inc.  
DS39616D-page 85