PIC18F2331/2431/4331/4431
TABLE 1-2:
PIC18F2331/2431 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Pin Name
Description
SPDIP,
SOIC
Type Type
QFN
PORTC is a bidirectional I/O port.
RC0/T1OSO/T1CKI
RC0
11
12
8
I/O
O
I
ST
—
ST
Digital I/O.
Timer1 oscillator output.
Timer1 external clock input.
T1OSO
T1CKI
RC1/T1OSI/CCP2/FLTA
9
RC1
I/O
ST
Analog
ST
Digital I/O.
Timer1 oscillator input.
Capture 2 input, Compare 2 output, PWM2 output.
Fault interrupt input pin.
T1OSI
CCP2
FLTA
I
I/O
I
ST
RC2/CCP1
RC2
13
14
10
11
I/O
I/O
ST
ST
Digital I/O.
CCP1
Capture 1 input/Compare 1 output/PWM1 output.
RC3/T0CKI/T5CKI/INT0
RC3
I/O
ST
ST
ST
ST
Digital I/O.
T0CKI
T5CKI
INT0
I
I
I
Timer0 alternate clock input.
Timer5 alternate clock input.
External Interrupt 0.
RC4/INT1/SDI/SDA
15
16
17
18
12
13
14
15
RC4
INT1
SDI
I/O
I
I
ST
ST
ST
I2C
Digital I/O.
External Interrupt 1.
SPI data in.
SDA
I/O
I2C™ data I/O.
RC5/INT2/SCK/SCL
RC5
INT2
SCK
SCL
I/O
I
I/O
I/O
ST
ST
ST
I2C
Digital I/O.
External Interrupt 2.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I2C mode.
RC6/TX/CK/SS
RC6
TX
CK
SS
I/O
O
I/O
I
ST
—
ST
TTL
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
SPI slave select input.
RC7/RX/DT/SDO
RC7
RX
DT
I/O
I
I/O
O
ST
ST
ST
—
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX/CK).
SPI data out.
SDO
VSS
VDD
8, 19 5, 16
7, 20 4, 17
P
P
—
—
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
CMOS = CMOS compatible input or output
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
I
= Input
O
P
= Power
DS39616D-page 18
2010 Microchip Technology Inc.
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