PIC18FXX20
4.14 RCON Register
Note 1: If the BOREN configuration bit is set
(Brown-out Reset enabled), the BOR bit
is ‘1’ on a Power-on Reset. After a
Brown-out Reset has occurred, the BOR
bit will be cleared, and must be set by
firmware to indicate the occurrence of the
next Brown-out Reset.
The RESET Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device RESET. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
2: It is recommended that the POR bit be set
after
a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
REGISTER 4-4:
RCON REGISTER
R/W-0
IPEN
U-0
—
U-0
—
R/W-1
RI
R/W-1
TO
R/W-1
PD
R/W-0
POR
R/W-0
BOR
bit 7
bit 0
bit 7
IPEN: Interrupt Priority Enable bit
1= Enable priority levels on interrupts
0= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as '0'
bit 6-5
bit 4
RI: RESETInstruction Flag bit
1= The RESETinstruction was not executed
0= The RESETinstruction was executed causing a device RESET
(must be set in software after a Brown-out Reset occurs)
bit 3
bit 2
bit 1
TO: Watchdog Time-out Flag bit
1= After power-up, CLRWDTinstruction, or SLEEPinstruction
0= A WDT time-out occurred
PD: Power-down Detection Flag bit
1= After power-up or by the CLRWDTinstruction
0= By execution of the SLEEPinstruction
POR: Power-on Reset Status bit
1= A Power-on Reset has not occurred
0= A Power-on Reset occurred
(must be set in software after a Power-on Reset occurs)
bit 0
BOR: Brown-out Reset Status bit
1= A Brown-out Reset has not occurred
0= A Brown-out Reset occurred
(must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS39609A-page 60
Advance Information
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
