PIC18FXX20
FIGURE 10-21:
RJ4:RJ0 PINS BLOCK DIAGRAM IN SYSTEM BUS MODE
Q
D
EN
EN
RD PORTJ
RD LATJ
Data Bus
I/O pin(1)
Port
D
Q
0
1
Data
WR LATJ
or
CK
Data Latch
PORTJ
D
Q
WR TRISJ
RD TRISJ
CK
TRIS Latch
Control Out
External Enable
System Bus
Control
Drive System
Note 1: I/O pins have diode protection to VDD and VSS.
FIGURE 10-22:
RJ7:RJ6 PINS BLOCK DIAGRAM IN SYSTEM BUS MODE
Q
D
EN
EN
RD PORTJ
RD LATJ
Data Bus
I/O pin(1)
Port
D
Q
0
1
Data
WR LATJ
or
CK
Data Latch
PORTJ
D
Q
WR TRISJ
CK
TRIS Latch
RD TRISJ
UB/LB Out
WM = 01
Drive System
System Bus
Control
Note 1: I/O pins have diode protection to VDD and VSS.
DS39609A-page 126
Advance Information
2003 Microchip Technology Inc.