PIC18FXX20
TABLE 10-9:
PORTE FUNCTIONS
Name
Bit#
Buffer Type
ST/TTL(1)
Function
RE0/RD/AD8
bit0
Input/output port pin, Read control for parallel slave port, or
address/data bit 8
For RD (PSP Control mode):
1= Not a read operation
0= Read operation, reads PORTD register (if chip selected)
Input/output port pin, Write control for parallel slave port, or
RE1/WR/AD9
RE2/CS/AD10
bit1
bit2
ST/TTL(1)
ST/TTL(1)
address/data bit 9
For WR (PSP Control mode):
1= Not a write operation
0= Write operation, writes PORTD register (if chip selected)
Input/output port pin, Chip Select control for parallel slave port, or
address/data bit 10
For CS (PSP Control mode):
1= Device is not selected
0= Device is selected
RE3/AD11
RE4/AD12
RE5/AD13
RE6/AD14
bit3
bit4
bit5
bit6
bit7
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
ST/TTL(1)
Input/output port pin or address/data bit 11.
Input/output port pin or address/data bit 12.
Input/output port pin or address/data bit 13.
Input/output port pin or address/data bit 14.
Input/output port pin, Capture2 input/ Compare2 output/PWM output
(PIC18F8X20 devices in Microcontroller mode only), or
address/data bit 15.
RE7/CCP2/AD15
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O or CCP mode, and TTL buffers when in System Bus or PSP
Control mode.
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Value on
Value on:
Name
TRISE
PORTE
LATE
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
all other
RESETS
POR, BOR
1111 1111
xxxx xxxx
xxxx xxxx
0-00 --00
0000 ----
1111 1111
uuuu uuuu
uuuu uuuu
0000 --00
0000 ----
PORTE Data Direction Control Register
Read PORTE pin/Write PORTE Data Latch
Read PORTE Data Latch/Write PORTE Data Latch
EBDIS
IBF
MEMCON
PSPCON
—
OBF
WAIT1
IBOV PSPMODE
WAIT0
—
—
—
—
WM1
—
WM0
—
Legend: x= unknown, u= unchanged. Shaded cells are not used by PORTE.
DS39609A-page 116
Advance Information
2003 Microchip Technology Inc.