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PIC18LF6620-I/PT 参数 Datasheet PDF下载

PIC18LF6620-I/PT图片预览
型号: PIC18LF6620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
TABLE 10-3: PORTB FUNCTIONS  
Name  
RB0/INT0  
Bit#  
Buffer  
Function  
bit0  
TTL/ST(1) Input/output pin or external interrupt input0.  
Internal software programmable weak pull-up.  
RB1/INT1  
bit1  
bit2  
bit3  
TTL/ST(1) Input/output pin or external interrupt input1.  
Internal software programmable weak pull-up.  
RB2/INT2  
TTL/ST(1) Input/output pin or external interrupt input2.  
Internal software programmable weak pull-up.  
RB3/CCP2(3)/INT3  
TTL/ST(4) Input/output pin, or external interrupt input3. Capture2 input/Compare2  
output/PWM output (when CCP2MX configuration bit is enabled, all  
PIC18F8X20 Operating modes except Microcontroller mode).  
Internal software programmable weak pull-up.  
RB4/KBI0  
bit4  
bit5  
TTL  
Input/output pin (with interrupt-on-change).  
Internal software programmable weak pull-up.  
RB5/KBI1/PGM  
TTL/ST(2) Input/output pin (with interrupt-on-change).  
Internal software programmable weak pull-up.  
Low voltage ICSP enable pin.  
RB6/KBI2/PGC  
RB7/KBI3/PGD  
bit6  
bit7  
TTL/ST(2) Input/output pin (with interrupt-on-change).  
Internal software programmable weak pull-up.  
Serial programming clock.  
TTL/ST(2) Input/output pin (with interrupt-on-change).  
Internal software programmable weak pull-up.  
Serial programming data.  
Legend: TTL = TTL input, ST = Schmitt Trigger input  
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.  
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.  
3: RC1 is the alternate assignment for CCP2 when CCP2MX is not set (all Operating modes except  
Microcontroller mode).  
4: This buffer is a Schmitt Trigger input when configured as the CCP2 input.  
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB  
Value on  
Value on  
all other  
RESETS  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
POR,  
BOR  
PORTB  
LATB  
RB7  
RB6  
RB5  
RB4  
RB3  
RB2  
RB1  
RB0  
xxxx xxxx uuuu uuuu  
xxxx xxxx uuuu uuuu  
1111 1111 1111 1111  
0000 0000 0000 0000  
LATB Data Output Register  
TRISB  
INTCON  
PORTB Data Direction Register  
GIE/  
GIEH  
PEIE/  
GIEL  
TMR0IE  
INT0IE  
RBIE  
TMR0IF INT0IF  
RBIF  
INTCON2  
INTCON3  
RBPU  
INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP  
INT1IP INT3IE INT2IE INT1IE INT3IF INT2IF  
RBIP  
1111 1111 1111 1111  
1100 0000 1100 0000  
INT2IP  
INT1IF  
Legend: x= unknown, u= unchanged. Shaded cells are not used by PORTB.  
DS39609A-page 108  
Advance Information  
2003 Microchip Technology Inc.  
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