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PIC18LF4320-I/ML 参数 Datasheet PDF下载

PIC18LF4320-I/ML图片预览
型号: PIC18LF4320-I/ML
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
The CALLand GOTOinstructions have the absolute pro-  
gram memory address embedded into the instruction.  
Since instructions are always stored on word bound-  
aries, the data contained in the instruction is a word  
address. The word address is written to PC<20:1>,  
which accesses the desired byte address in program  
memory. Instruction #2 in Figure 5-5 shows how the  
instruction ‘GOTO 000006h’ is encoded in the program  
memory. Program branch instructions, which encode a  
relative address offset, operate in the same manner.  
The offset value stored in a branch instruction repre-  
sents the number of single-word instructions that the  
PC will be offset by. Section 24.0 “Instruction Set  
Summary” provides further details of the instruction  
set.  
5.7  
Instructions in Program Memory  
The program memory is addressed in bytes. Instruc-  
tions are stored as two bytes or four bytes in program  
memory. The Least Significant Byte of an instruction  
word is always stored in a program memory location  
with an even address (LSB = 0). Figure 5-5 shows an  
example of how instruction words are stored in the pro-  
gram memory. To maintain alignment with instruction  
boundaries, the PC increments in steps of 2 and the  
LSB will always read ‘0’ (see Section 5.4 “PCL,  
PCLATH and PCLATU”).  
FIGURE 5-5:  
INSTRUCTIONS IN PROGRAM MEMORY  
Word Address  
LSB = 1  
LSB = 0  
Program Memory  
Byte Locations →  
000000h  
000002h  
000004h  
000006h  
000008h  
00000Ah  
00000Ch  
00000Eh  
000010h  
000012h  
000014h  
Instruction 1:  
Instruction 2:  
0Fh  
EFh  
F0h  
C1h  
F4h  
55h  
03h  
00h  
23h  
56h  
MOVLW  
GOTO  
055h  
000006h  
Instruction 3:  
MOVFF  
123h, 456h  
second word of the instruction is executed by itself (first  
word was skipped), it will execute as a NOP. This action  
is necessary when the two-word instruction is preceded  
by a conditional instruction that results in a skip opera-  
tion. A program example that demonstrates this con-  
cept is shown in Example 5-3. Refer to Section 24.0  
“Instruction Set Summary” for further details of the  
instruction set.  
5.7.1  
TWO-WORD INSTRUCTIONS  
PIC18F2X20/4X20 devices have four two-word instruc-  
tions: MOVFF, CALL, GOTOand LFSR. The second  
word of these instructions has the 4 MSBs set to ‘1’s  
and is decoded as a NOPinstruction. The lower 12 bits  
of the second word contain data to be used by the  
instruction. If the first word of the instruction is exe-  
cuted, the data in the second word is accessed. If the  
EXAMPLE 5-3:  
CASE 1:  
TWO-WORD INSTRUCTIONS  
Object Code  
Source Code  
0110 0110 0000 0000 TSTFSZ  
REG1  
; is RAM location 0?  
; No, skip this word  
; Execute this word as a NOP  
; continue code  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
MOVFF  
REG1, REG2  
ADDWF  
REG3  
CASE 2:  
Object Code  
Source Code  
0110 0110 0000 0000  
1100 0001 0010 0011  
1111 0100 0101 0110  
0010 0100 0000 0000  
TSTFSZ  
MOVFF  
REG1  
; is RAM location 0?  
; Yes, execute this word  
; 2nd word of instruction  
; continue code  
REG1, REG2  
REG3  
ADDWF  
DS39599C-page 58  
2003 Microchip Technology Inc.  
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