PIC18F2220/2320/4220/4320
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal oper-
4.0
RESET
The PIC18F2X20/4X20 devices differentiate between
various kinds of Reset:
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations as indicated in Table 4-2. These bits
are used in software to determine the nature of the
Reset. See Table 4-3 for a full description of the Reset
states of all registers.
a) Power-on Reset (POR)
b) MCLR Reset while executing instructions
c) MCLR Reset when not executing instructions
d) Watchdog Timer (WDT) Reset (during
execution)
A simplified block diagram of the on-chip Reset circuit
is shown in Figure 4-1.
e) Programmable Brown-out Reset (BOR)
f) RESETInstruction
The enhanced MCU devices have a MCLR noise filter
in the MCLR Reset path. The filter will detect and
ignore small pulses.
g) Stack Full Reset
h) Stack Underflow Reset
The MCLR pin is not driven low by any internal Resets,
including the WDT.
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
The MCLR input provided by the MCLR pin can be dis-
abled with the MCLRE bit in Configuration Register 3H
(CONFIG3H<7>). See Section 23.1 “Configuration
Bits” for more information.
FIGURE 4-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
RESET
Instruction
Stack Full/Underflow Reset
Stack
Pointer
External Reset
MCLRE
MCLR
( )_IDLE
Sleep
WDT
Time-out
VDD Rise
Detect
POR Pulse
BOREN
VDD
Brown-out
Reset
S
OST/PWRT
OST
10-bit Ripple Counter
1024 Cycles
Chip_Reset
R
Q
OSC1
32 µs
INTRC(1)
65.5 ms
PWRT
11-bit Ripple Counter
Enable PWRT
(2)
Enable OST
Note 1: This is the INTRC source from the internal oscillator block and is separate from the RC oscillator of the CLKI pin.
2: See Table 4-1 for time-out situations.
2003 Microchip Technology Inc.
DS39599C-page 43
MICROCHIP [ MICROCHIP ]
