PIC18F2220/2320/4220/4320
24.0
INSTRUCTION SET SUMMARY
The
control
instructions may use some of the following
operands:
• A program memory address (specified by ‘n’)
• The mode of the
CALL
or
RETURN
instructions
(specified by ‘s’)
• The mode of the table read and table write
instructions (specified by ‘m’)
• No operand required
(specified by ‘—’)
All instructions are a single word except for three dou-
ble word instructions. These three instructions were
made double word instructions so that all the required
information is available in these 32 bits. In the second
word, the 4 MSbs are ‘1’s. If this second word is
executed as an instruction (by itself), it will execute as
a
NOP.
All single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a
NOP.
The double word instructions execute in two instruction
cycles.
One instruction cycle consists of four oscillator periods.
Thus, for an oscillator frequency of 4 MHz, the normal
instruction execution time is 1
µs.
If a conditional test is
true, or the program counter is changed as a result of
an instruction, the instruction execution time is 2
µs.
Two-word branch instructions (if true) would take 3
µs.
instructions can have.
All examples use the format ‘nnh’ to represent a hexa-
decimal number, where ‘h’ signifies a hexadecimal
digit.
The Instruction Set Summary, shown in Table 24-2,
lists the instructions recognized by the Microchip
Assembler (MPASM
TM
).
provides a description of each instruction.
The PIC18 instruction set adds many enhancements to
the previous PICmicro instruction sets, while maintain-
ing an easy migration from these PICmicro instruction
sets.
Most instructions are a single program memory word
(16 bits) but there are three instructions that require two
program memory locations.
Each single-word instruction is a 16-bit word divided
into an opcode, which specifies the instruction type and
one or more operands, which further specify the oper-
ation of the instruction.
The instruction set is highly orthogonal and is grouped
into four basic categories:
•
•
•
•
Byte-oriented
operations
Bit-oriented
operations
Literal
operations
Control
operations
The PIC18 instruction set summary in Table 24-2 lists
byte-oriented, bit-oriented, literal
and
control
opera-
tions. Table 24-1 shows the opcode field descriptions.
Most
byte-oriented
instructions have three operands:
1.
2.
3.
The file register (specified by ‘f’)
The destination of the result
(specified by ‘d’)
The accessed memory
(specified by ‘a’)
The file register designator ‘f’ specifies which file
register is to be used by the instruction.
The destination designator ‘d’ specifies where the
result of the operation is to be placed. If ‘d’ is zero, the
result is placed in the WREG register. If ‘d’ is one, the
result is placed in the file register specified in the
instruction.
All
bit-oriented
instructions have three operands:
1.
2.
3.
The file register (specified by ‘f’)
The bit in the file register
(specified by ‘b’)
The accessed memory
(specified by ‘a’)
24.1 READ-MODIFY-WRITE OPERATIONS
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified and
the result is stored according to either the instruction or
the destination designator ‘d’. A read operation is per-
formed on a register even if the instruction writes to that
register.
For example, a “BCF
PORTB,1”
instruction will read
PORTB, clear bit 1 of the data, then write the result
back to PORTB. The read operation would have the
unintended result that any condition that sets the RBIF
flag would be cleared. The R-M-W operation may also
copy the level of an input pin to its corresponding output
latch.
The bit field designator ‘b’ selects the number of the bit
affected by the operation, while the file register desig-
nator ‘f’ represents the number of the file in which the
bit is located.
The
literal
instructions may use some of the following
operands:
• A literal value to be loaded into a file register
(specified by ‘k’)
• The desired FSR register to load the literal value
into (specified by ‘f’)
• No operand required
(specified by ‘—’)
2003 Microchip Technology Inc.
DS39599C-page 255
MICROCHIP [ MICROCHIP TECHNOLOGY ]
