PIC18F2220/2320/4220/4320
FIGURE 10-7:
BLOCK DIAGRAM OF
RB2:RB0 PINS
FIGURE 10-8:
BLOCK DIAGRAM OF
RB4 PIN
VDD
VDD
RBPU(2)
Analog Input Mode
RBPU(2)
Data Bus
Weak
Pull-up
Weak
Pull-up
P
P
Data Latch
D
Q
Data Bus
D
Q
I/O pin(1)
WR LATB
or PORTB
I/O pin(1)
WR LATB
or PORTB
CK
TRIS Latch
CK
Data Latch
D
Q
D
Q
WR TRISB
TTL
Input
Buffer
CK
WR TRISB
CK
TRIS Latch
TTL
Input
Buffer
RD TRISB
RD LATB
RD TRISB
RD LATB
Latch
Q
Q
D
RD PORTB
Set RBIF
Q
D
EN
Q1
EN
EN
RD PORTB
D
Schmitt Trigger
Buffer
RD PORTB
Q3
INTx
From RB7:RB5
EN
To A/D Converter
To A/D Converter
Note 1: I/O pins have diode protection to VDD and VSS.
Note 1: I/O pins have diode protection to VDD and VSS.
2: To enable weak pull-ups, set the appropriate TRIS
bit(s) and clear the RBPU bit (INTCON2<7>).
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RBPU bit (INTCON2<7>).
FIGURE 10-9:
BLOCK DIAGRAM OF RB3/CCP2 PIN
VDD
Port/CCP2 Select
CCP2 Data Out
RBPU
Weak
P
Analog Input Mode
Pull-up
0
1
RD LATC
VDD
P
Data Bus
D
Q
WR LATB
or PORTB
CK
Data Latch
RB3 pin(1)
TTL Input
Buffer
D
Q
N
WR TRISB
RD TRISC
CK
TRIS Latch
VSS
Q
D
EN
EN
Schmitt
Trigger
RD PORTB
CCP2 Input
Analog Input Mode
To A/D Converter
Note 1: I/O pins have diode protection to VDD and VSS.
2003 Microchip Technology Inc.
DS39599C-page 105