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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
9.2  
PIR Registers  
Note 1: Interrupt flag bits are set when an interrupt  
condition occurs regardless of the state of  
its corresponding enable bit or the global  
enable bit, GIE (INTCON<7>).  
The PIR registers contain the individual flag bits for the  
peripheral interrupts. Due to the number of peripheral  
interrupt sources, there are two Peripheral Interrupt  
Flag registers (PIR1, PIR2).  
2: User software should ensure the appropri-  
ate interrupt flag bits are cleared prior to  
enabling an interrupt and after servicing  
that interrupt.  
REGISTER 9-4:  
PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1  
R/W-0  
PSPIF(1)  
bit 7  
R/W-0  
ADIF  
R-0  
R-0  
R/W-0  
SSPIF  
R/W-0  
R/W-0  
R/W-0  
RCIF  
TXIF  
CCP1IF  
TMR2IF  
TMR1IF  
bit 0  
bit 7  
PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit  
1= A read or a write operation has taken place (must be cleared in software)  
0= No read or write has occurred  
Note 1: This bit is reserved on PIC18F2X20 devices; always maintain this bit clear.  
bit 6  
bit 5  
bit 4  
bit 3  
bit 2  
ADIF: A/D Converter Interrupt Flag bit  
1= An A/D conversion completed (must be cleared in software)  
0= The A/D conversion is not complete  
RCIF: USART Receive Interrupt Flag bit  
1= The USART receive buffer, RCREG, is full (cleared when RCREG is read)  
0= The USART receive buffer is empty  
TXIF: USART Transmit Interrupt Flag bit  
1= The USART transmit buffer, TXREG, is empty (cleared when TXREG is written)  
0= The USART transmit buffer is full  
SSPIF: Master Synchronous Serial Port Interrupt Flag bit  
1= The transmission/reception is complete (must be cleared in software)  
0= Waiting to transmit/receive  
CCP1IF: CCP1 Interrupt Flag bit  
Capture mode:  
1= A TMR1 register capture occurred (must be cleared in software)  
0= No TMR1 register capture occurred  
Compare mode:  
1= A TMR1 register compare match occurred (must be cleared in software)  
0= No TMR1 register compare match occurred  
PWM mode:  
Unused in this mode.  
bit 1  
bit 0  
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit  
1= TMR2 to PR2 match occurred (must be cleared in software)  
0= No TMR2 to PR2 match occurred  
TMR1IF: TMR1 Overflow Interrupt Flag bit  
1= TMR1 register overflowed (must be cleared in software)  
0= TMR1 register did not overflow  
Legend:  
R = Readable bit  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
- n = Value at POR  
DS39599C-page 92  
2003 Microchip Technology Inc.  
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