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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC18F2220/2320/4220/4320
5.0
MEMORY ORGANIZATION
5.1
Program Memory Organization
There are three memory types in Enhanced MCU
devices. These memory types are:
• Program Memory
• Data RAM
• Data EEPROM
Data and program memory use separate busses which
allow for concurrent access of these types.
Additional detailed information for Flash program mem-
ory and data EEPROM is provided in
and
respectively.
A 21-bit program counter is capable of addressing the
2-Mbyte program memory space. Accessing a location
between the physically implemented memory and the
2-Mbyte address will cause a read of all ‘0’s (a
NOP
instruction).
The PIC18F2220 and PIC18F4220 each have
4 Kbytes of Flash memory and can store up to 2,048
single-word instructions.
The PIC18F2320 and PIC18F4320 each have
8 Kbytes of Flash memory and can store up to 4,096
single-word instructions.
The Reset vector address is at 0000h and the interrupt
vector addresses are at 0008h and 0018h.
The Program Memory Maps for PIC18F2220/4220 and
PIC18F2320/4320 devices are shown in Figure 5-1
and Figure 5-2, respectively.
FIGURE 5-1:
PROGRAM MEMORY MAP
AND STACK FOR
PIC18F2220/4220
FIGURE 5-2:
PROGRAM MEMORY MAP
AND STACK FOR
PIC18F2320/4320
PC<20:0>
21
CALL,RCALL,RETURN
RETFIE,RETLW
Stack Level 1
PC<20:0>
21
CALL,RCALL,RETURN
RETFIE,RETLW
Stack Level 1
Stack Level 31
Reset Vector
0000h
Stack Level 31
Reset Vector
0000h
High Priority Interrupt Vector 0008h
Low Priority Interrupt Vector 0018h
On-Chip
Program Memory
High Priority Interrupt Vector 0008h
Low Priority Interrupt Vector 0018h
0FFFh
1000h
On-Chip
Program Memory
1FFFh
2000h
User Memory Space
Read ‘0’
Read ‘0’
1FFFFFh
200000h
1FFFFFh
200000h
2003 Microchip Technology Inc.
DS39599C-page 53
User Memory Space