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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
TABLE 26-24: A/D CONVERTER CHARACTERISTICS: PIC18F2220/2320/4220/4320 (INDUSTRIAL)  
PIC18F2220/2320/4220/4320 (EXTENDED)  
PIC18LF2220/2320/4220/4320 (INDUSTRIAL)  
Param  
No.  
Symbol  
Characteristic  
Resolution  
Min  
Typ  
Max  
Units  
Conditions  
A01  
NR  
10  
bit VREF 3.0V  
A03  
A04  
A06  
A07  
EIL  
Integral Linearity Error  
Differential Linearity Error  
Offset Error  
<±1  
<±1  
<±1  
<±1  
LSb VREF 3.0V  
LSb VREF 3.0V  
LSb VREF 3.0V  
LSb VREF 3.0V  
EDL  
EOFF  
EGN  
Gain Error  
A10  
A20  
Monotonicity  
guaranteed(2)  
VREF Reference Voltage Range  
3
AVDD – AVSS  
V
For 10-bit resolution  
(VREFH – VREFL)  
A21  
A22  
A25  
A28  
A29  
A30  
VREFH Reference Voltage High  
VREFL Reference Voltage Low  
AVSS + 3.0V  
AVSS – 0.3V  
VREFL  
AVDD + 0.3V  
AVDD – 3.0V  
VREFH  
V
V
For 10-bit resolution  
For 10-bit resolution  
VAIN  
Analog Input Voltage  
Analog Supply Voltage  
Analog Supply Voltage  
V
AVDD  
AVSS  
ZAIN  
VDD – 0.3  
VSS – 0.3  
VDD + 0.3  
VSS + 0.3  
2.5(4)  
V
Tie to VDD  
Tie to VSS  
V
Recommended Impedance of  
Analog Voltage Source  
kΩ  
A40  
A50  
IAD  
A/D Current  
from VDD  
PIC18FXX20  
180(5)  
90(5)  
µA Average current during  
conversion(1)  
PIC18LFXX20  
µA  
IREF  
VREF Input Current (3)  
±5(5)  
µA During VAIN acquisition.  
µA During A/D conversion  
cycle.  
±150(5)  
Note 1: When A/D is off, it will not consume any current other than minor leakage current. The power-down current  
spec includes any such leakage from the A/D module.  
2: The A/D conversion result never decreases with an increase in the input voltage and has no missing  
codes.  
3: VREFH current is from RA3/AN3/VREF+ pin or AVDD, whichever is selected as the VREFH source.  
VREFL current is from RA2/AN2/VREF- pin or AVSS, whichever is selected as the VREFL source.  
4: Assume quiet environment. If adjacent pins have high-frequency signals (analog or digital), ZAIN may need  
to be reduced to as low as 1 kto fight crosstalk effects.  
5: For guidance only.  
2003 Microchip Technology Inc.  
DS39599C-page 341  
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