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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
MOVFF  
Move f to f  
MOVLB  
Move literal to low nibble in BSR  
Syntax:  
[ label ] MOVFF fs,fd  
Syntax:  
[ label ] MOVLB k  
0 k 255  
k BSR  
Operands:  
0 fs 4095  
0 fd 4095  
Operands:  
Operation:  
Status Affected:  
Encoding:  
Operation:  
(fs) fd  
None  
Status Affected:  
None  
0000  
0001  
kkkk  
kkkk  
Encoding:  
1st word (source)  
2nd word (destin.)  
Description:  
The 8-bit literal ‘k’ is loaded into  
the Bank Select Register (BSR).  
1100  
1111  
ffff  
ffff  
ffff  
ffff  
ffffs  
ffffd  
Words:  
Cycles:  
1
1
Description:  
The contents of source register ‘fs’  
are moved to destination register  
‘fd’. Location of source ‘fs’ can be  
anywhere in the 4096-byte data  
space (000h to FFFh) and location  
of destination ‘fd’ can also be  
anywhere from 000h to FFFh.  
Either source or destination can be  
W (a useful special situation).  
MOVFFis particularly useful for  
transferring a data memory location  
to a peripheral register (such as the  
transmit buffer or an I/O port).  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read literal  
‘k’  
Process  
Data  
Write  
literal ‘k’ to  
BSR  
MOVLB  
5
Example:  
Before Instruction  
BSR register  
=
=
0x02  
0x05  
After Instruction  
BSR register  
The MOVFFinstruction cannot use  
the PCL, TOSU, TOSH or TOSL as  
the destination register.  
The MOVFFinstruction should not  
be used to modify interrupt settings  
while any interrupt is enabled (see  
Page 87).  
Words:  
Cycles:  
2
2 (3)  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
(src)  
Process  
Data  
No  
operation  
Decode  
No  
operation  
No  
operation  
Write  
register ‘f’  
(dest)  
No dummy  
read  
MOVFF  
REG1, REG2  
Example:  
Before Instruction  
REG1  
REG2  
=
=
0x33  
0x11  
After Instruction  
REG1  
REG2  
=
=
0x33,  
0x33  
DS39599C-page 280  
2003 Microchip Technology Inc.  
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