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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
DECFSZ  
Decrement f, skip if 0  
DCFSNZ  
Decrement f, skip if not 0  
Syntax:  
[ label ] DECFSZ f [,d [,a]]  
Syntax:  
[ label ] DCFSNZ f [,d [,a]]  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
Operands:  
0 f 255  
d [0,1]  
a [0,1]  
Operation:  
(f) – 1 dest,  
skip if result = 0  
Operation:  
(f) – 1 dest,  
skip if result 0  
Status Affected:  
Encoding:  
None  
Status Affected:  
Encoding:  
None  
0010  
11da  
ffff  
ffff  
0100  
11da  
ffff  
ffff  
Description:  
The contents of register ‘f’ are  
decremented. If ‘d’ is ‘0’, the result  
is placed in W. If ‘d’ is ‘1’, the result  
is placed back in register ‘f’  
(default).  
Description:  
The contents of register ‘f’ are  
decremented. If ‘d’ is ‘0’, the result  
is placed in W. If ‘d’ is ‘1’, the result  
is placed back in register ‘f’  
(default).  
If the result is ‘0’, the next instruc-  
tion which is already fetched is dis-  
carded and a NOPis executed  
instead, making it a two-cycle  
instruction. If ‘a’ is ‘0’, the Access  
Bank will be selected, overriding  
the BSR value. If ‘a’ = 1, then the  
bank will be selected as per the  
BSR value (default).  
If the result is not ‘0’, the next  
instruction which is already fetched  
is discarded and a NOPis executed  
instead, making it a two-cycle  
instruction. If ‘a’ is ‘0’, the Access  
Bank will be selected, overriding  
the BSR value. If ‘a’ = 1, then the  
bank will be selected as per the  
BSR value (default).  
Words:  
Cycles:  
1
Words:  
Cycles:  
1
1(2)  
1(2)  
Note: 3 cycles if skip and followed  
by a 2-word instruction.  
Note: 3 cycles if skip and followed  
by a 2-word instruction.  
Q Cycle Activity:  
Q1  
Q Cycle Activity:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
Decode  
Read  
register ‘f’  
Process  
Data  
Write to  
destination  
If skip:  
Q1  
If skip:  
Q1  
Q2  
Q3  
Q4  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
If skip and followed by 2-word instruction:  
If skip and followed by 2-word instruction:  
Q1  
Q2  
Q3  
Q4  
Q1  
Q2  
Q3  
Q4  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
No  
No  
No  
No  
No  
No  
No  
No  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
operation  
HERE  
DECFSZ  
GOTO  
CNT  
LOOP  
HERE  
ZERO  
NZERO  
DCFSNZ TEMP  
:
:
Example:  
Example:  
CONTINUE  
Before Instruction  
Before Instruction  
TEMP  
PC  
=
Address (HERE)  
=
?
After Instruction  
After Instruction  
CNT  
=
=
=
=
CNT - 1  
0;  
TEMP  
If TEMP  
PC  
If TEMP  
PC  
=
=
=
=
TEMP - 1,  
0;  
If CNT  
PC  
Address (CONTINUE)  
0;  
Address (ZERO)  
0;  
If CNT  
PC  
Address (HERE+2)  
Address (NZERO)  
2003 Microchip Technology Inc.  
DS39599C-page 275  
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