PIC18F2220/2320/4220/4320
TABLE 1-2:
PIC18F2220/2320 PINOUT I/O DESCRIPTIONS
Pin Number Pin Buffer
PDIP SOIC Type Type
1
1
I
P
I
9
9
I
I
I/O
10
10
O
O
I/O
2
2
I/O
I
3
3
I/O
I
4
4
I/O
I
I
O
5
5
I/O
I
I
6
6
I/O
I
O
7
7
I/O
I
I
I
O
TTL
Analog
TTL
Analog
—
Digital I/O.
Analog input 4.
SPI Slave Select input.
Low-Voltage Detect input.
Comparator 2 output.
See the OSC2/CLKO/RA6 pin.
See the OSC1/CLKI/RA7 pin.
ST/OD
ST
—
Digital I/O. Open-drain when configured as output.
Timer0 external clock input.
Comparator 1 output.
TTL
Analog
Analog
Digital I/O.
Analog input 3.
A/D Reference Voltage (High) input.
TTL
Analog
Analog
Analog
Digital I/O.
Analog input 2.
A/D Reference Voltage (Low) input.
Comparator Reference Voltage output.
TTL
Analog
Digital I/O.
Analog input 1.
TTL
Analog
Digital I/O.
Analog input 0.
—
—
TTL
ST
Description
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an active-low Reset
to the device.
Programming voltage input.
Digital input.
Pin Name
MCLR/V
PP
/RE3
MCLR
V
PP
RE3
OSC1/CLKI/RA7
OSC1
CLKI
RA7
OSC2/CLKO/RA6
OSC2
CLKO
RA6
RA0/AN0
RA0
AN0
RA1/AN1
RA1
AN1
RA2/AN2/V
REF
-/CV
REF
RA2
AN2
V
REF
-
CV
REF
RA3/AN3/V
REF
+
RA3
AN3
V
REF
+
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
RA5/AN4/SS/LVDIN/C2OUT
RA5
AN4
SS
LVDIN
C2OUT
RA6
RA7
ST
Oscillator crystal or external clock input.
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS otherwise.
CMOS
External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.)
TTL
General purpose I/O pin.
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
General purpose I/O pin.
PORTA is a bidirectional I/O port.
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
O = Output
P
= Power
OD = Open-drain (no diode to V
DD
)
Note 1:
Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.
2:
Alternate assignment for CCP2 when CCP2MX is cleared.
2003 Microchip Technology Inc.
DS39599C-page 11
MICROCHIP [ MICROCHIP TECHNOLOGY ]
