PIC17C75X
Example 9-4 shows the sequence to do an 16 x 16
signed multiply. Equation 9-2 shows the algorithm
used. The 32-bit result is stored in four registers
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pairs most significant bit (MSb)
is tested and the appropriate subtractions are done.
EXAMPLE 9-4: 16 x 16 SIGNED MULTIPLY
ROUTINE
MOVFP
MULWF
ARG1L, WREG
ARG2L
; ARG1L * ARG2L ->
PRODH:PRODL
;
MOVPF
MOVPF
PRODH, RES1 ;
PRODL, RES0 ;
EQUATION 9-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
;
;
MOVFP
MULWF
ARG1H, WREG
ARG2H
; ARG1H * ARG2H ->
PRODH:PRODL
;
RES3:RES0
MOVPF
MOVPF
PRODH, RES3 ;
PRODL, RES2 ;
= ARG1H:ARG1L • ARG2H:ARG2L
16
= (ARG1H • ARG2H • 2 )
+
+
+
+
+
MOVFP
MULWF
ARG1L, WREG
ARG2H
8
; ARG1L * ARG2H ->
(ARG1H • ARG2L • 2 )
;
PRODH:PRODL
8
(ARG1L • ARG2H • 2 )
MOVFP
ADDWF
MOVFP
ADDWFC
CLRF
PRODL, WREG ;
RES1, F
; Add cross
(ARG1L • ARG2L)
PRODH, WREG ;
products
16
(-1 • ARG2H<7> • ARG1H:ARG1L • 2 )
RES2, F
WREG, F
RES3, F
;
;
;
16
(-1 • ARG1H<7> • ARG2H:ARG2L • 2 )
ADDWFC
;
MOVFP
MULWF
ARG1H, WREG ;
ARG2L ; ARG1H * ARG2L ->
;
PRODH:PRODL
MOVFP
ADDWF
MOVFP
ADDWFC
CLRF
PRODL, WREG ;
RES1, F
; Add cross
PRODH, WREG ;
products
RES2, F
WREG, F
RES3, F
;
;
;
ADDWFC
;
;
BTFSS
GOTO
MOVFP
SUBWF
MOVFP
SUBWFB
ARG2H, 7
SIGN_ARG1
ARG1L, WREG ;
RES2
ARG1H, WREG ;
RES3
; ARG2H:ARG2L neg?
; no, check ARG1
;
SIGN_ARG1
BTFSS
GOTO
ARG1H, 7
CONT_CODE
; ARG1H:ARG1L neg?
; no, done
MOVFP
SUBWF
MOVFP
SUBWFB
;
ARG2L, WREG ;
RES2
ARG2H, WREG ;
RES3
;
CONT_CODE
:
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 63