PIC17C75X
The need for a large general purpose memory space
dictated a general purpose RAM banking scheme. The
upper nibble of the BSR selects the currently active
general purpose RAM bank. To assist this, a MOVLR
bank instruction has been provided in the instruction
set.
7.8
Bank Select Register (BSR)
The BSR is used to switch between banks in the data
memory area (Figure 7-12). In the PIC17C752, and
PIC17C756 devices, the entire byte is implemented.
The lower nibble is used to select the peripheral regis-
ter bank.The upper nibble is used to select the general
purpose memory bank.
If the currently selected bank is not implemented (such
as Bank 13), any read will read all '0's. Any write is
completed to the bit bucket and the ALU status bits will
be set/cleared as appropriate.
All the Special Function Registers (SFRs) are mapped
into the data memory space. In order to accommodate
the large number of registers, a banking scheme has
been used. A segment of the SFRs, from address 10h
to address 17h, is banked.The lower nibble of the bank
select register (BSR) selects the currently active
“peripheral bank.” Effort has been made to group the
peripheral registers of related functionality in one bank.
However, it will still be necessary to switch from bank
to bank in order to address all peripherals related to a
single task. To assist this, a MOVLB bank instruction
has been included in the instruction set.
Note: Registers in Bank 15 in the Special Func-
tion Register area, are reserved for
Microchip use. Reading of registers in this
bank may cause random values to be read.
FIGURE 7-12: BSR OPERATION
BSR
7
4 3
0
(2)
(1)
Address
Range
4
5
6
7
0
1
2
3
8
15
(Peripheral)
Banks
SFR
10h
17h
• • •
Bank 4 Bank 5 Bank 6 Bank 7
Bank 0 Bank 1 Bank 2 Bank 3
Bank 8 Bank 15
15
0
1
2
3
4
(RAM)
GPR
20h
FFh
• • •
Banks
Bank 0
Bank 1
Bank 2
Bank 15
Bank 3
Bank 4
Note 1: Only Banks 0 through 7 are implemented. Selection of an unimplemented bank is not recommended.
Bank 15 is reserved for Microchip use, reading of registers in this bank may cause random values to be read.
2: Bank 0 and Bank 1 are implemented for the PIC17C752, and Banks 0 through 3 are implemented for the PIC17C756.
Selection of an unimplemented bank is not recommended.
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 53
MICROCHIP [ MICROCHIP ]
