PIC17C4X
Using Figure 6-11, the operations of the PC and
PCLATH for different instructions are as follows:
6.7
Program Counter Module
The Program Counter (PC) is a 16-bit register. PCL, the
low byte of the PC, is mapped in the data memory. PCL
is readable and writable just as is any other register.
PCH is the high byte of the PC and is not directly
addressable. Since PCH is not mapped in data or pro-
gram memory, an 8-bit register PCLATH (PC high latch)
is used as a holding latch for the high byte of the PC.
PCLATH is mapped into data memory. The user can
read or write PCH through PCLATH.
a) LCALLinstructions:
An 8-bit destination address is provided in the
instruction (opcode). PCLATH is unchanged.
PCLATH → PCH
Opcode<7:0> → PCL
b) Read instructions on PCL:
Any instruction that reads PCL.
PCL → data bus → ALU or destination
PCH → PCLATH
The 16-bit wide PC is incremented after each instruc-
tion fetch during Q1 unless:
c) Write instructions on PCL:
Any instruction that writes to PCL.
8-bit data → data bus → PCL
PCLATH → PCH
• Modified by GOTO, CALL, LCALL, RETURN, RETLW,
or RETFIEinstruction
• Modified by an interrupt response
• Due to destination write to PCL by an instruction
d) Read-Modify-Write instructions on PCL:
“Skips” are equivalent to a forced NOP cycle at the
skipped address.
Any instruction that does a read-write-modify
operation on PCL, such as ADDWF PCL.
Figure 6-11 and Figure 6-12 show the operation of the
program counter for various situations.
Read: PCL → data bus → ALU
Write: 8-bit result → data bus → PCL
PCLATH → PCH
FIGURE 6-11: PROGRAM COUNTER
OPERATION
e) RETURNinstruction:
PCH → PCLATH
Stack<MRU> → PC<15:0>
Internal data bus <8>
Using Figure 6-12, the operation of the PC and
PCLATH for GOTOand CALLinstructions is a follows:
8
CALL, GOTOinstructions:
PCLATH
8
A 13-bit destination address is provided in the
instruction (opcode).
8
Opcode<12:0> → PC <12:0>
PC<15:13> → PCLATH<7:5>
Opcode<12:8> → PCLATH <4:0>
PCH
PCL
FIGURE 6-12: PROGRAM COUNTER USING
THE CALL AND GOTO
The read-modify-write only affects the PCL with the
result. PCH is loaded with the value in the PCLATH.
For example, ADDWF PCLwill result in a jump within the
current page. If PC = 03F0h, WREG = 30h and
PCLATH = 03h before instruction, PC = 0320h after the
instruction.To accomplish a true 16-bit computed jump,
the user needs to compute the 16-bit destination
address, write the high byte to PCLATH and then write
the low value to PCL.
INSTRUCTIONS
15
13 12
8 7
Opcode
0
Last write
to PCLATH
5
3
8
4
5
7
0
The following PC related operations do not change
PCLATH:
PCLATH
8
a) LCALL, RETLW, and RETFIEinstructions.
15
0
8 7
b) Interrupt vector is forced onto the PC.
PCL
PCH
c) Read-modify-write instructions on PCL (e.g.BSF
PCL).
1996 Microchip Technology Inc.
DS30412C-page 41
MICROCHIP [ MICROCHIP ]
